can start after let us say 20 seconds. Hello everyone, welcome to the first lecture of unit 3. During this the next hour I will introduce the concept of synthesis I will start with the very very basic what is synthesis what does the process do, what does it need and most importantly where does the process of synthesis fits in the ASIC design code, you would also look at the design compiler family comes in office which I believe all of you would be using in your project works and assignment and further when you go into the industry and also design compiler is in fact the most popular tool of choice for synthesis. There are other tools also like hidden shuttle compiler there is magma, but we will focus are all the commands we discuss all the scripts will be focused to synopsis design compiler. However, it should not be a major problem in switching to a different tool if you want to with the need arises because the concepts remain same only few commands are different from one to other otherwise everything is remain same. So what is synthesis, synthesis by definition means combining three existing elements to form something or in other words you can also say that synthesis is nothing but conversion of an idea into implementation. We introduce one more thing called logic synthesis again logic synthesis is combining primitive logic function to form a design at least that means a function in design code. So here on the left hand side we see a jigsaw puzzle which is jumbled up each of the component is labeled as TP, TP means a technology primitive this could be there be a RTL retention there will be a BL and then we want that there will be a BL to be converted into a gate level net list which would again be sent to fabrication and this process of conversion is called synthesis. Obviously, it should meet some of the goals for example, let us say we are working on a processor from Intel. Now that processor each processor from any any company will have some frequency goal let us say the goal is it should meet 1 gigahertz so that is our goal. So whatever design we do whatever technology node we choose we have to make sure that the processor meets the criteria of 1 gigahertz frequency. So that is an example of a goal the output is net list less a lot of other files which go to physical design tools and then layout is done they are they are sent to function. The concept of automated design is theoretically it is possible to convert any digital function to a logic circuit this is what is done by the synthesis tool it automatically synthesizes circuit from function description. For example, on the left hand side you have a logic function that is equal to A or B and C or D and E. Now this is a this is this statement on the left hand side is written into a high level language it could be the end of a BLB. So the tool will read this and it will convert this to something represented by the right hand side which is a logic circuit. This is a very simple simplistic explanation of the process. Now we have we are assuming some things here one thing we are assuming is that the standard cells that is the cells the logics like in the previous example the OR gates the 2 OR gates and the 3 input language they are assuming their existence. So if primitive standard cells are previously designed we are assuming that these cells are previously designed that is we have a library which contains all these cells and we have the functional description of the cells we have the timing specifications of the cells we have the layout of the cells that means everything is already designed we could build a large number of various digital circuits using these parts. So the group of primitive cells which are used to build larger circuits is called standard cell library. Now building a standard cell library is a completely independent subject on its own it involves a lot of size analysis layout and all that. So during this course and during your project work and assignment we will be assuming that we have a library of standard cells available with us and we will simply use that library to create circuits of choice for an application. In the next lecture we will actually spend a lot of time on understanding how the standard cell library data is represented what files do we need what do those files contain. So we will see a lot of that but we will assume that everything is available for us just have to start on the design. Now synopsis has a library available for university students it is a 90 nanometer generic library which can be used for project work and assignment. Now why synthesis why can't we start with why can't we hope that is the assume you have to design a decoder that is a three to a decoder what we saw in the example of that. And now there can be two approaches first approach can be that I I know what a decoder looks like what the logic circuit looks like I can draw it on paper then I can go to the library and choose the cells the software itself hook them up from the netlist myself and then proceed through the physical design process. Second approach which is a high level approach I would what I would do I would write an HDL which is I would write an HDL and in well log let us say in well log I write something like this for the decoder. I use synthesis to convert this into a netlist into a gate lemon netlist and then again proceed for for physical design. This is possible only for very small design or very specific design or some very special circuits where you do not want the regular digital designs in the display you will find that not useful but otherwise for all the big design huge designs big chips obviously drawing circuit by hand is not at all possible plus the tools nowadays are very sophisticated in terms of that they can choose what best cell what cell would suit best for let us say different type of code or let us say you want a lower area. So, it could choose a different cell when compared to when you want a faster circuit and the complexity keeps on increasing as you go one level down. So, an HDL for a we will have let us say for a full chip an HDL will have a few hundred files with some thousands of lines of code and then when it goes through gate level it expands into a million gates which are hooked up together again and it goes to now since gate level database is not the one that is manufactured it we convert this gate level data base into a transistor there is schematic using physical design tools and then this again the each gate will have a let us say n number of cells we saw that a two input can get is comprised of four CMOS of two NMOS S2PMOS that means four transistor. So, similarly let us say you have a one million design gate gate level network it will it will translate easily into a five to six million transistor count again this transistor count is then converted into polygons which is nothing but layout. So, layout we also call them as polygons because ultimately they are just a bunch of rectangles squares different type of polygons which represent different layers of the chip. So, some polygons should represent the metal layer some will represent the poly layer and so on. So, as we go down the hierarchy as in so the number of elements increases exponentially the complexity also increases and dealing with a higher complex very complex design in the sense of let us say if you are working on gate level at least that will take more effort time and cost when compared to working on a HDL. We will see that the difference is that is there any need when we need to work on a gate level network yes there is a need when sometimes we need to work on gate level network, but most of the time for our course purpose of our course we will start with an HDL almost always we will start with a very long of VLHD and description of a design and then proceed for synthesis. I would also assume that almost all of you should be familiar with Berlop we will whatever code we see here will be Berlop because it is the most popular language of the right now and presently. There are the HDL users also but I would restrict my slides of codes to Berlop. So, if somebody is not familiar with Berlop I would suggest that the reader Berlop sort of to start with it you could start in a two or three days you could read about and start coding sort of this problem and then you come back to this lecture so that you can understand it better not this lecture are in particular, but all the coming lectures this discussion. Now logic synthesis is divided into three parts the first part is called translation second part is called mapping and the last part is called optimizing the first part the translation is the is the name given to the process of converting the HDL description into something called a GTEC netlist. So, GTEC is a term specific to synopsis GTEC means generic boolean. So, now let us say so the hardware description language the Berlop code on the different side this code here would be the pricing of a higher level language comes up if else case statements always locked and so on. So, this HDL here the art here is actually technology independent that means it does not matter what technology mode we are targeting for the RTL does not need to represent that when I talk about I mean let us say we are targeting is a 90 nanometer or 65 nanometer where the the nanometer length is the the transfer channel length. So, each technology mode mode for example, a 90 nanometer technology mode that are spawns to the manufacturing process where the channel length of NMOS and PMOS is 90 nanometer. So, when we start when we go for to decide deciding a chip deciding a then then we have to choose a technology mode, but when we write the RTL when we write a higher level description language the design is technology independent. When it goes through translation it gets converted into something called GTEC netlist the generic boolean netlist and this netlist also is technology independent that means still the process of translation still the still this this generic boolean we are not concerned about what technology we are going to get a design manufactured in. Right now we are only concerned about the logic that is it is limited by the RTL the second process the second part of the process is mapping. Mapping is the process where design compiler will map the GTEC boolean into the gates available in your library here is where the technology comes in. So, let us say I am targeting a product for a 90 nanometer technology I would have a 90 nanometer standard cell library listening. Now that standard cell library will contain lot of cells different types of hands or man or inverter purpose and so on and now the generic boolean will be mapped into this gate level netlist and the last part which is the optimization will make sure that all the goals that we have specified in terms of performance linear and power and method. Now let us say the same design I want to I have manufactured in 90 nanometer now I want to go to 65 nanometer. The first part that is foundation will remain same it will not change because the generic boolean is not changing it is same the destructive of technology it is simply a collection of gates that design compiler the gates that are available in design compiler they are not linked to any technology they are generic. So, the first process will not change the second process will change because the 65 nanometer library would be different from 90 nanometer library and because the second part is changing the mapping part is changing the optimization will also change because now although the goals might be same, but the underlying cells are different. So, the optimization of that part would be optimization carried out by design compiler on a 65 nanometer design will can be and will be different from the one in 99 nanometer. Now first we start with the functional distribution it is written in a hybrid decision language that we also call it RTL register transfer level most of the designs which will practice hands-on will be synchronous. Synchronous means there will be a clock all the handshake between different parts of the design will be based on a clock signal the very big advantage of a synchronous design is that it I will be this thing is very very important simplify time verification we will see that in further in unit 3 and unit 4 what do we mean by this it simplifies optimization algorithms again this is again a derivative of this part and simplify time timing verification optimal results it is very easy to set goals for a synchronous design as compared to an asynchronous design. A synchronous design is very very difficult to verify and to meet time. So, it is recommended that whatever design problem we have we try to solve it in the synchronous domain and so that goal setting and optimization would be easy again the way we code RTL it affects the results we will see that the coming slide how do we write better codes and how do we make sure that this one very very famous saying is that when we write RTL we should think in terms of hardware not in terms of software that is let us say we are writing a case statement we should think that what that case statement will transit into after simplify what type of hardware will it consume. So, a lot of the area of the design performance of the design a lot depends on how do we write the code. So, the process of translation now we see in detail the process of translation will cover all these things it will do sgl syntax and rule check it will optimize sgl we will see we will see few reports how does it do that it will map arithmetic functions for example, let us say you are writing a plus b you are writing c is equal to a plus b. So, that plus looks very simple in the law, but that plus translates to an adder in hardware that adder would be mapped to a g-tech adder a generic boolean adder this is what is meant by arithmetic function mapping. Sequential function mapping whenever you have always lost that represents a flip flop or a latch that particular register will be mapped to a generic flip flop or a generic latch then there will be combination function mapping that is mapping of and an ors all this mapping is done still done at generic boolean thing at a g-tech thing. The second and third parts of the process are combined together we call it mapping or optimization it maps boolean functions to technology specific primitive function it modifies mapping to meet design goals. So, this part here this part here is actually the optimization part. So, when it says it modifies mapping to the first at first path synthesis will just map the generic boolean generic boolean it will map it to a target technology and then in the next pass it will start optimizing it will start looking at your clock frequency it will start looking at the timing which is given in the library files it will start looking at the review of the design it will start optimizing the design for for all these these four parameters. So, these four parameters are the key and they are in fact, in order of priority. So, the design rules come first we look into detail what design rules mean just a hint it means that the gates the logic circuit the individual gates let us say and and all and all they are not driving any load which is beyond their capability this should be met first step. If design rules are not met the timing is not reliable. So, for timing to be reliable design rules have to be met for met first step. So, this is the highest priority this goes number one timing goes number two because if timing is not met it is not guaranteed that design will function correctly area goes number three that is the last almost the second last since we have to first make sure that the circuit is activated and is accurately time there only we should talk about area third comes area and again last comes power but power can be given high priority some people the priorities of these are dynamic, but this is the general rule design rules timing area and power the process of optimization is constraint written. So, there are few statements written here create clause set into the day set out to the last match area do not take too much about it that the first three lines represent the timing goals the last line match area 0 represents the area goal it just tells the tool that just work hardest I mean same set match area 0 will actually not result into a zero area it is just a method of telling the tool that do your best job. So, what the tool will do it will try and meet timing and for a design represented by the top three lines and for that let us say there are n number of configurations which all of let us say they are five configuration five types of different gate level networks all of them meeting the three statement among these five the tool will choose the one which has lowest gate that is meant by set match area 0. So, now we see a very nice graph here on the x axis is the delay or you could also call it the performance of the design on the y axis we have area. Now, for a if you to go from left to right that is the delay is decreasing that is the performance is going down and the area is also going down we come to the if you go you see the lower area the small area this quadrant here this is for a smaller area the delay sorry for a larger area the delay will be shorter. So, if so these two are fighting each other the area and the delay always fighting each other there is one more angle to it point power, but let us let us simplify and see area and delay points. Now, if you want to reduce area what you would do is you would add more sequential more sequencing that is let us say you have a decoder kind of example the more parallel paths you have the larger will be your area and it will be slower, but if you increase the number of stages the area will be less, but the circuit will be slower it again even if you talk about the cell design the cells which are faster and have better drive strength are always bigger in area because again the W by L ratio would be high they will probably have inbuilt inverter or buffer stages. So, these two things area and delay are always fighting each other and the optimizes the process of optimization is entirely dependent on the constraint. So, the set of four statements here these four statements are what we call constraints same function can be represented by different circuit we see that you could have a NAND or base circuit you could always have a AND or base circuit it is in a MUX based design you could actually use a simple MUX or you could implement a MUX using AND gates and OR gates. So, and different circuits will have different physical parameters the tool which choose what to take based on our constraints. So, let us say you have a function y is equal to a and b and c and d the variate one on the left hand side is a circuit where the first stage uses two input AND gates the second stage uses a three input NAND gate a three input AND gate on the right hand side you have a four input AND gate and there is one two input AND gate. The power number and the area numbers are just some random numbers here they are they do not represent actual they just tell that what is higher what is lower in power. So, obviously, these four input AND gates if you actually go and draw the CMOS circuit of a four input AND gate you will see that it is a pretty large circuit correspondingly the two input and the three input set are lower in area. So, we see that the the variant to area is higher, but power is lower or let us say comparable to variant one. So, different and again if you if you see this one more important thing is that if we see the delay from e to y in variant two the delay from e to y the delay from e to y just crosses one AND gate, but delay from assuming this is the delay from e to y here crosses two AND gates or you could also say e is here again it will be but so the delay from e to y would be different in variant one and variant two. Now the constraint with that we give on e will also determine what variant will be picked up. So, that the table here shows that it shows the representative power and area numbers for sense. Obviously, a two input AND gate will have the lowest power in the lowest area a three input will have more power and more area when compared to the two input again as we keep increasing the number of input in a in a gate the power in area keeps on increasing. It does not mean that gates which have a number of inputs higher than two or three are undesirable that will again depend on our delay requirements. So, obviously,let us say a three input AND gate the delay from a to output from input one to output from input two to output from input three to output all will be similar in this whereas, let us say if you have if you try and use always a two input AND gate or a two input gates you will see that the delay keeps on increasing since you are you will be adding more stages to your combination. So, this is where what we say that this why we say that the delay and area are always fighting each other. So, the more number of stages you have in a combination path it will be slower, but it will have lower area if you decrease number of stages and you increase the parallelism you will have more area, but faster circuit. So, the let us let us see what optimization tradeoffs are. So, the circuit as we saw the circuit design goals are the first goal is obvious that is it should be design rules then comes timing. So, we should have small delays that is our goal power we should have lower power consumption and smaller area. Now, you cannot meet all three if all three are very aggressive. So, circuit design is a tradeoff of timing area and power optimal design. When we say optimal design it means that it meets all our goals is found as a result of synthesis based on the priority set by design. So, let us say there is a CPU let us say there is an 8 bit CPU or 8 bit 8 bit 8 bit next microprocessor design of that.  What do you think will have more area? Obviously, the 600 megahertz will have more area because I am asking the tool to give me more performance, but there will be some cost and the cost is area and obviously, the power. So, 600 megahertz microprocessor netlist will have more area and more power when compared to a 400 megahertz design. This is what is meant by the priority set by design. For example, when the delays are small the power consumption is high and vice versa. Circuit variant is chosen on the basis of the importance of one parameter. So, in fact, the most complex part of synthesis is actually setting the goals. You have the goals in mind, but then we have to translate those goals into a number of commands given to the synthesis tool. This is the most important and most difficult part of synthesis how to make sure that whatever goals we have on paper are given correctly to the tool. So, the goals the design goals timing area power are defined by something called constraints. So, constraints are set up rules that will set limits on circuit parameter and it will set priorities. So, during synthesis process and every time there is a choice every time the tool has a choice between several perfect variants the one meeting your constraints is always chosen. So, you could say in other words that synthesis is nothing but an optimization problem. So, if you go back to most of you would have studied the course of optimization and in optimization there is a very famous when a very interesting problem called a traveling salesman problem. So, if you have not read about it please read about it it is a very interesting concept. It tells that it tries to solve a problem of a traveling salesman he has to travel let us say through 10 cities. So, now the goal is the goal can be multiple one could be a traveling cost other could be a traveling time. Now, let us say so you be assigned that ok if he goes from A to B the cost is let us say x if he goes from B to C the cost is let us say y and so on. This is the problem now there is an algorithm which tends to solve this traveling salesman problem and optimizes the total cost exactly same thing happens the constraints set a goal and the tool will try to optimize the circuit based on the constraints. So, it is nothing but an optimization problem and every optimization problem depends on the goals we give. Next we see something called environment attribute environment parameters and nets net attributes affect circuit operation. Now, we saw in synthesis we have been talking about picking up gates we are not talking about how how they are connected together that means what are the parameters of the interconnect the copper interconnect connected together. Please note the interconnect information is only estimated during synthesis it is never accurate because circuit the the accurate information interconnect information only comes after physical design after the layout is done. So, in the process of synthesis we do not have the layout information obviously. So, any interconnect information we provide is based on some estimates we will see what those estimates are. Synthesis steps need to account for such such estimates for correct results. So, we should provide this provide this data one thing which we know for sure will be environmental parameters that is we we know that our design should work at a particular voltage temperature and some process relations. The net attributes the parasitic resistance and capacitance are at this estimates at this point at the point of synthesis, but we should provide something it should not be taken as 0 it it will be inaccurate. The environment parameters here very interesting concept let us see. So, this figure here tells what goes as input to synthesis and what comes as output project synthesis tool we give it the RTL code ok let us let us go and order in which we will actually do the process. So, the first thing that we need to set up we need to decide is this what technology are we targeting and then provide that particular cell library to the second we should know what are the environment that is what are the operating conditions we are targeting. Are we targeting a 1 dot 0 mode are we targeting 1 dot 2 mode this will affect synthesis and actually this will affect this also because environment attributes that is voltage process and temperature actually also determine the cell library. Usually you have the the because the timing of the standard cell let us say timing of an AND gate will change depending on what is the voltage what process are we talking about and what is the temperature. So, by fixing the environment attribute we also could be cell library and in turn we provide the library information and the operating condition to the tool then we go on and and give the tool the RTL code and then we define the we give this and then we give the we give the constraints these are the inputs what comes out is this what comes out is a gate level net list in very long or we are let us say very long. So, the gate level net list would be in very long and then this gate level net list goes to the physical design tool the physical synthesis tool where actually the the net list the gates are laid out the wires are the actual wires are drawn routing takes place and so many things happen the as far as this course is concerned we will not be looking at this our job is to make sure that we did get a correct gate level net list from the logic synthesis tool. So, we would be looking at cell library in an exception we will go into details of how a cell library looks like what does it contain we will see how to specify environment attributes we will see examples of this course does not teach very long it assumes that you know very long, but we will go through the good practices of the log coding or particle coding what type of code results into what type of hardware we look a lot into constraints this is the most important part and we look very heavily in this very heavily into this we will see how to specify this and obviously we will see the commands related to all of these problems. Now, let us see where the design compiler fit in an ASIC design flow. So, the ASIC design flow is something like this obviously we start with an architecture the architecture will tell the scope and the problem description for example let us say we want to make we want to design an 8 bit response this is the design this is the problem statement. Now, we will go and finalize the architecture what type of registers will it contain what frequency are we targeting that will in turn decide what technology node we should choose and so on then we will start coding. So, we will start writing the the microprocessor code in where log so, which is the SGA description then now since we have let us go to back to the previous side we have this RTL code we have the cell library since we chose the technology we have a moment at the view we will go on and there is one more process which comes this is not represented here is the functional identification simulation that is we have to first make sure that whatever we have written in very long actually confirms to the functionality that we define in the in our architecture. This is again a separate very big field of which is called verification that is you make sure by using some test stimulus that the RTL code the very short code actually performs according to the functional expectations. So, once we have made sure that the RTL actually is verified 100 percent we go to synthesis you could also use synthesis for design exploration obviously you do not need it to be passing 100 percent verification you could also do that many people do that. So, we go to design compiler in design compiler there is a tools called SGL compiler which actually reads the the log and the few things it checks syntax and all then is it goes to GTEC it does timing optimization, data path optimization, power optimization. So, design compiler is nothing but a book way of tool. So, inside design compiler you have SGL compiler and you have power compiler for power optimization in area optimization then if you want to add some DFT because there is a DFT compiler and timing closure and so on.  The input to this process is constraints this is the file format is called SBC you will see this design where library we will see what design learning, technology library, symbol library and so on do not worry too much about depth for now. So, the output is optimized netlist this optimized netlist goes to some different design tools one example is IC compiler something else it goes to place and route and now we have to also make sure that the netlist here optimized netlist here is equivalent in functionality to the RTL here. These two are equivalent you have to make sure this does not mean please note this does not mean that the tool here the synopsis design compiler tool here has some problem. It can mean that whatever RTL whatever SDN discussion we wrote is not actually good enough to produce a good netlist. There can be many many reasons why these two are not equal these two are not equal there can be many many reasons why these two are not equal, but we will see we will see in the process of synthesis that what could those reasons be, but we have to make sure that these two are equivalent the process is called formal verification formality we will look a bit into this in this course. We will see why this is called formal and what is the difference between formal and stimulus based. So, just note that you could now somebody could ask that during the verification of my RTL code I have a test I have a stimulus. Now I can use the same stimulus on a netlist and make sure that a some sanity is correct yes you can do it, but from formal verification is a much more sophisticated and much more accurate we are doing. Please hold this heart for a while now the high level we will go a bit deep into the flow chart goes a bit deep into the high level design tool. So, you have design data preparation which includes SDL coding constraint generation library development we will not be looking into library development we are assuming that library is also already provided to us. Then we go into goal specification and function simulation what I was talking about this is a tool called dp explorer which will help you in doing some design exploration we will not go into that. We have to make sure that the design needs it is within 10 percent of time imposed in arbitrary requirement then we go to design compiler. The first process what it tells here is actually the design exploration stage of it many times when you are starting a first design you are not even sure what goals you should take. So, this process actually helps us a bit it helps us in using the DC explorer DC explorer what it does is it will do a very basic program because any feedback on all the designs in books after placing out needs to have some program information. So, this design explorer will DC explorer it helps you in programming the design, but we are not going into that just make a note that the process here this the first half will help us in setting the goal. Now we have a design ready we have the goal ready now we go to design compiler and again the the flowchart tells us that if you do not meet our goals either before physical design or after physical design we have to go back after design compiler and either modify our goals or modify our design one of these. Now let us look at the design compiler family the first and foremost a tool we are looking at is DC expert. So, you do not have to actually start up different tools so when you start design compiler we call it DC shell this is not a single tool it is has a bunch of tools inside it so all commands will work there for all the tools so you do not have to worry about invoking different tools for different applications. Obviously for each tool has something a needed license for example DC expert needs the license we will see there is one more tool called DC expert. So each I will call them a feature each feature needs a separate license something also so depending on what licenses do you have available with you those features will be available in your design compiler in your DC shell. So DC expert is a basic synthesis compiler it provides authentication for a a timing power using wire load models for delay estimation wire load model estimate the inter-connect delay DC what they look like. So what capability is this tool has it provides hierarchical compile that will stop down a bottom up in detail what does that mean it gives full incremental compile techniques sequential of inter-sequential optimization for complex the problem that is we saw time borrowing so it is able to do that for large bit designs timing analysis any synthesis tool will be able to do basic timing analysis to make sure the timing is meeting we will see a lot more of that. It has a online interface and graphical user interface first up when we start any tool we are emptied by the graphical user interface but for tools like design compiler and time time you will be heavily using the interface I personally favor text based interface because it is a lot of reporting capability the graphical user interface is only useful to see the circuit but for a bigger design you actually do want to go into that until there is some very exceptional and big problem because it will contain multi-million gates and you do not know where to start. So that is why I prefer text based that is the command line interface the advanced so DC expert is the basic component tool basic synthesis feature the advanced is DC Ultra what is being used in the industry to use DC Ultra it is much more advanced version of DC expert it does apart from what DC expert does it does does an advanced automatic optimization advanced delay optimization it helps in critical processing synthesis registry timing which is a very important feature it helps in that it has advanced it has capability for advanced time analysis you will see a lot of advanced here so it is just an advanced version of DC expert it is also capable of running into a big design it supports multiple execution for faster than time which is very important for this design the rest of the things are same as dp expert but for the scope of this project dp expert should be sufficient unless and until you are going for very high speed design or something like that dp expert should be sufficient and then there is a graphical user interface for this is called design vision again it is a separate feature not a separate tool so it provides analysis viewing and analyzing designs at detail level so it provides new dialog boxes drop down menus and so on so on but I would recommend starting with and sticking with the the text phase interface that is the command line interface it will be much more intuitive than the graphical user interface as you start practicing once of this you will see that is in that there is a feature called sdl compiler sdl compiler it translates your weblog and the sdl into gtech so again you have this sdl compiler is very much like a weblog compiler what you might be using in your other course for example mc weblog this sdl compiler has a lot of those features that is what it does now your weblog code will not be same so not 100% of weblog is not in the there are constructs which do not have any hardware equations for example in the weblog many times we write we want to delay something we write hash n number let us say hash 5 hash 5 is equal to b that is b is assigning being assigned to a after service or delay now this particular delay unit that is hash 5 I have that thing equivalent to in hardware that is yes we have hardware we have the person in the what will give some amount but saying hash 5 will not result into some hardware that is this the synthesis tool will simply ignore that so this sdl compiler helps us in analyzing if our code if our RTA code is actually synthesizer it will give out warnings it will give out errors if you have cases like this so you could use the sdl compiler into correcting your design there is a family of components for design with now if you go back and remember that we call that the process of a translation converts the material into a g-tech as well into a generic Boolean network so a designer library is a collection of reusable circuit design between both which are tightly integrated into some of the synthesis environment so let us say if you have the license for the feature available and let us say you write a plus b in your RTA code now this class now assume the 8 and b amd to be let us say 8 bit what we are doing here is we are doing is 8 bit addition that adder will not be a simple adder now this designer library contains a lot of adder different adder you have carry look ahead you have carry save and so on so it implements all the all the all the adder architecture and you could use them or tell the tool by simply writing a plus b and also telling so if you write a plus b and simply synthesize if your design requirements are not to everything if you do not need a very fast adder it will pick up a ripple adder implement by itself now you could tell the tool you could tell design compiler that do not use ripple adder it is slow use some other adder architecture so it will do that so a design library is a collection of all such adder multipliers and so on there are lot of components there so it contains a lot of components which will help you in designing complex circuits and it is very tightly integrated into synthesis environment during synthesis design compiler will select the right component with the best speed and area optimization from the design program many times you do not need to specify mission in RTL code but I have seen people they are very particular that okay for example I would want that in all the cases my RTL code in multiply I multiply I use should be a boot for the class so I can actually specify in my RTL that for a multiplication operation I can say that that you that you multiply 0 1 less than the name of a designer component I could directly instantiate it in my law and DC and she also design compiler will pick it up and synthesize it so this is all in the next lecture so we what we saw let us review of it so we saw what the process of synthesis is it combines the process of synthesis and the broken into three parts translation mapping and optimization the translation is simply conversion of your RTL code into a generic Boolean at least the process of mapping and optimization actually convert that Boolean at least into a specific technology that will be met list and further optimizes based on the goal supervising we saw that we can the goal to provide our timing area and power assuming all the design rules are met in that order of priority so we will see next lecture we look into the library the standard cell library what types of standard cells are there how is timing and area information presented how to read that it is very very important then we will start we will begin with the RTL code we will see how we will see the good practices of RTL coding for synthesis we will see the process of synthesis we will spend a lot more time on writing the constraints and writing how to write how to mention the how to set timing goals how to set area goals and so on thank you


Hello, welcome to SSUnitech, so still decide and this is part 6 of SQL Server Performance Training. So today we gonna discuss about Non-Cluster Index. In our last video we have discussed about the cluster index and what are the indexes. So if you haven't watched last video of this video series. So I would strongly recommend watch that video before going forward. So let's start with Non-Cluster Index. So what is Non-Cluster Index? So it's an index like in textbook. The data is stored in one place and index are in other place. Like in textbook we have in the starting and end of the book we have the indexes. This is same like that. The index will have pointer to the storage location of the data. So table can have more than one Non-Cluster Index. But as we have discussed table can have only one cluster index. So this is a syntax for creating any Non-Cluster Index. So as we can see create Non-Cluster then the index, then index name on, then table name and then column names. So here we have only one column but in real time you may have more than one columns. So go to on SQL Server Management Studio to create the index on a table. As I am using SQL 2017 you may have another version of SQL Server but query would be same for all the versions. So this is the table which we have created in last video. So this is employee temperature table and here we will have only one cluster index which have been created in last video. So we can check. So this is our cluster index and here in the description we can check cluster and column is Add SID. So if we will have our query like this, select a stick from our table where in our condition we have city and this query is going to use again and again. So then we need to create one more index that would be Non-Cluster Index and column would be city. This is the query to create the Non-Cluster Index. Create Non-Cluster Index then the index name on, table name then city column. So let me execute this query. So command completed successfully that's why table will have one Non-Cluster Index. We can check and we can scroll down and here we will have Non-Cluster Index and in our description we can check Non-Cluster and column would be city. So this is Non-Cluster Index. So in our upcoming video once we will discuss about the scans and logical leads then we will check about the performance. How indexes will help to increase the performance. Next would be what are the differences between cluster index and Non-Cluster Index. So as I have told you only one cluster index can be per table and Non-Cluster Index more than one and maximum size would be triple nine and in cluster index it doesn't require any additional space. So in case of Non-Cluster Index it requires additional space. In case of cluster index demo queries would be faster but in case of Non-Cluster Index demo queries would be slow because it will need to update the index as well as the table. So this is the differences between Non-Cluster Index and cluster index. So thank you so much for watching this video. If you like this video please subscribe our channel to get many more videos. Don't forget to press the bell icon to get the notification of our upcoming videos. Thank you so much.


Do you want to see something scary? Whoa! Alright, okay. You handled that pretty well. But what about? Wow. Alright. That's fine. That's fine. You think I'm not that good at that? I'll tell you what. How about this? All right, Matt. Just post that picture of old Bilbo seeing the ring again for the first time. Yeah, yeah. Just like right now. Yeah. That's what I thought. Huh? Can't handle it. Well, tell you what. Do you want to be scary like me? Well, then you're in luck because in Pathfinder, there's rules for that. So this spooky season, we thought it'd be fun to give you a couple of builds that would work well for an evil campaign. I mean, hey, maybe you can make them work for a less nefarious stuff too, but for now, evil. The first build up today is going to be Intimidate Focused Rogue, built to leave your opponents shaking. Very literally. But first, let's have a nice sit-down conversation about what it means to be in or run an evil campaign. And to do that, let's look at what it means to be evil. What over 3,000 years of philosophy tell us is that there are a lot of people who have a lot of different opinions on that. What over 3,000 different forum posts regarding evil and tabletop gaming tell us is that no matter what opinion you have, it's trash, garbage, awful, and you should feel bad about it. That is to say, most forums are dark, unhappy places. But no. Obviously how each table defines evil is going to be different, and the very first thing you should do as a group when deciding to do an evil campaign is hash out what that means to you. That said, here's my take on what it means vis-a-vis TTRPGs. A good alignment means that you'll go out of your way to consider the welfare of others, even to your own detriment. A neutral alignment means that you have a very normal concern for the welfare of others.  So, how do we square that with a game where cooperation is paramount? Haha, simple. We just screw over our table mates and leave them to know. Bad. Wrong. That's the easy way to play evil. But we are better than that. Here's the trick. Purpose. Evil will keep things around if they're useful to them. If they serve a purpose. So make sure the rest of the party is one of those things. As long as you're united in purpose against something, like say a powerful necromancer that has reanimated you all back to life to dispatch on various tasks as he rises to power but that you are all scheming to eventually overthrow and take the empire up for your very own, you can work with others for the promotion of your own welfare. And there's dozens of excuses and ways to make working together with purpose work. Just know that since this is a cooperative game, it's your responsibility to play your character in a way that benefits the enjoyment of everyone.  I mean, by all means, go for it. Might I suggest that you all open up a tabletop gaming forum? But realistically, that's not what most groups are interested in. Alright, alright, enough moralizing. I hear you. On to the build. To successfully build an Intimidate Rogue, the first thing we need to do is check out how fear effects work in Pathfinder. Cause wouldn't you know it, there are some fiddly bits to work out.  But we're specifically going to be talking about the conditions shaken, frightened and panicked. First question, are those related to fear effects somehow? And the answer is yes. They are the result of being afeared in certain circumstances, such as surprise, surprise, the demoralized feature of the Intimidate skill. Which also means that things that protect from fear, like an aura of courage, will protect from this build as well. But hey, that's where the benefit of leaving your party members alive and unbackstabbing comes in, right? Moreover, they are cumulative fear effects. If you get shaken, and you get shaken again, you get frightened. And if you get shaken or frightened from there, you get panicked. Well, most of the time. But we'll get to that later. So shaken, what's that do? A creature that is shaken gets minus two for attacks, saves, skill checks, and just flat ability checks. This is what I always refer to as everything important. Kind of like ordering something with the works. Is it actually everything? No, but pretty much everything you're going to care about regularly. Further up the chain, what about frightened? It's a more severe version of shaken, and it adds in that the affected creature must flee. Even using special abilities or spells to do so if necessary. And what about panicked? The same thing, but this same poor, poor creature also drops whatever they're holding. Rude, right? Good. That's what we want, because we're evil. Okay, so how are we planning on inflicting these conditions? For sure, the easiest way to get a creature shaken is with the Intimidate skill. Yep, the same one that lets you stick up unsuspecting grade school age street urchins and halflings on the street. What's the difference? Am I right? In combat, we can use a standard action to demoralize an opponent by rolling Intimidate versus a DC of 10, plus the target's hit dice, plus the target's wisdom modifier. Well, I mean, easy enough, right? We just do that a couple of times. We've got our enemies fling for the hills, right? Well, no. See what I said most of the time before? Turns out that demoralize has an annoying nuh-uh-uh clause when it comes to stacking shaken effects. Well, whatever are we to do? Enter the Rogue, and specifically the Unchained Rogue because why play any other variant now that this exists? Plus, we are going to use a little bit of that Unchaining in just a minute to start with stats. We're going to do something a little strange here and spec primarily into strength instead of dexterity. After that, we'll favor Charisma as a close secondary. Why? You may ask? Well, we'll see. Oh, yes. You'll all see. Because, you know, that's the purpose of an informational vid. Anyway, so stats sorted, what next? There are two crucial parts of this build, and the first important thing is that we're going to be taking the Thug archetype. Now, you may be thinking that as a Thug, we've got to speak in a thick Brooklyn accent, but you know what? That is a harmful stereotype. And all my henchmen speak in a boisterous Fargo accent, don't you know? Now the only thing that's offensive is my skill at accents. Whoop-dah! So anyway, the purpose here is simple. As a Thug, whenever we demoralize, we can add rounds of shaken together. And anytime we can add a fifth round, we can add one round of frightened instead. Hey, away around that problem we had before! Thanks, rules! Okay, now the second crucial bit of the build, the enforcer feat. This feat says that anytime we deal non-lethal damage with a melee weapon, we get a demoralized check as a free action. Hey, already pretty cool, right? Ah, but then, if that demoralized check is successful, it shakens the target for a number of rounds equal to damage. So as long as you can deal five damage, boom! Instant frightened. Pretty neat, right? I mean, uh, evil. Pretty evil, right? So yes, this largely locks us into non-lethal damage. But since we're just trying to scare people into fleeing anyway, that's not the biggest deal. If you end up not going to strength for the benefits I'm going to mention in a second, you can stick to decks, taking advantage of the unchained rogue's finesse training and go to weapon fighting with two saps to great effect here. The other prime use of the unchained rogue is using rogue's edge for the Intimidate Skill Unlock, which adds yet another way to turn demoralized into frightened. Now, just to finish out, there are a few more feats that can make us both build and to be smashed by. First, intimidating prowess is that strength-focused payoff I've been mentioning. It doesn't replace your charisma modifier with strength for the purposes of intimidating. It adds both of them together. That is very cool, and in my opinion, why it's better than going for agile maneuvers in a dex build. Next up, the feat, Cornigan Smash! This lets you use a free action to intimidate when you hit with a power attack. Now, does that stack with the free demoralized from the enforcer feat? Hmm, the number of free actions you're allowed to use in a given moment is up to GM discretion, and I wouldn't be surprised if most of them tend towards, yeah, not so much. But at least it gives you a way to get in that free check if you need to use legal damage. And lastly, dazzling display. So this one straight up does not interact with enforcer, because it doesn't deal damage at all, but it does work with the thug bonuses and everything else you've got going for intimidate. So it's still gonna come in handy. Hey, even just one round of AoE shaken ain't nothing to... Well, you know. And there you have it. A spooky, scary skel- skel- skel- skeleroog? A spooky, scary skeleroog. If that doesn't knock your block off, come back next time and we'll be creating a lab-perfect slasher villain in 5e. Bye-bye. No? Still no? Well, I can't say I didn't try. Hey, do you like dice? I bet you like dice because you're watching a D&D channel. You know who has the best dice? It's dice dungeons. They've got acrylic dice. They've got metal dice. They've got super cool gemstone dice. They've also got battle mats that are washable. They've got super cool little metal coins you can flip and then go, oh no, it's a tail.  They aren't as annoying. Oh, that's terrible. And that's all thanks to the sponsor of this video, Dice Dungeons. And you can use checkout code Dormonster for 10% off your order. How about that?


Attention Pre-PA students and PA students! I am excited to announce that Get That C University will be launching this coming Sunday, October 11th. Get That C University is the coolest place to help you get into PA school and through PA school. So go right now to GetThatCUniversity.com and sign up so you can be the first to know when the site launches. And in celebration of the launch of Get That C University, I will be coming out with a brand new video every day this week answering all of your questions. So leave a comment in the comment section below and tune in to see if your comment is one of those that I answer. Go on over to Get That C University right now and sign up so we can help you get that C.  It's Adana. Welcome back to my channel. I know, I know some of you are excited or you're surprised to see me today. And that's because you haven't seen my video from yesterday. So if you haven't seen my video in that video, I stated that I will be going live every day this week or putting out a video I should say every day this week. In celebration of my new platform, Get That C University. So if you haven't heard about it, go on over to GetThatCUniversity.com right now and sign up so you can be the first to know when my platform launches because it will be launching this upcoming Sunday, October 11th. But I said that I was going to be answering all of you guys' questions and so I have had some questions that have been posted to me. So I'll be addressing some of those throughout this week. But one such question is from YB. So I'll have that question up on the screen somewhere for you guys to see it as well. If you have a question that you want answered, go ahead and leave that in the comment section below right now as well. And subscribe so that you can know when my new videos come out. But it says, Dear Adana, please give the advice about shadowing. It says, I'm done with all prereqs except this. Nobody wants to take me for shadowing now. So sad. And yes, YB, it is so sad that there aren't really anyone doing shadowing right now and that's mainly because of COVID. So it's been a little bit more difficult getting people in because you want to minimize the amount of exposure that individuals are getting, especially students right. And so honestly, at my hospital, we only just started letting med students and PA students back into like their rotations. So that has actually been something that we've really not had for the past six months that I've been there. But in this last month of September, they've been having it. And so when it comes to shadowing, it's a lot difficult now because, hey, people aren't allowing you in. And I get that I get that that that ploy that plight that you have. But I have a solution. And it is virtual shadowing, which I will be offering on my new platform get that to university. So with the virtual shadowing, what I've decided to do is have various different PAs. And, you know, in the future, we're going to have other professionals as well, in the health care field, give kind of take you through their day, they're going to walk you through their day as a, you know, neural PA or myself as a trauma PA, or as a general surgery PA, or as a pediatric PA, whatever it is, you're going to be able to choose from several different physician assistants, or doctors, or whatever it may be, nurse practitioners, and they're going to be able to walk you through their day. You're going to virtually see like a patient with them. And you're going to be able to ask them questions once all of this is done in the form. So you can also look and see like, I honestly just kind of reach out there, look on Instagram and see if there's anyone that is actually offering in person shadowing experiences. Although I think that that is like something of the past now. So PA schools are going to kind of have to get on board because you're not going to be able to get shadowing hours like you used to before, because hey, we're not allowing people in like the, the hospital and just the medical settings like we used to, they're either going to decrease the amount of shadowing experiences that they're requiring for you, or they are going to just allow virtual shadowing to be the thing of the future. You know, we are in a world where we're, we communicate via Zoom and StreamYard and YouTube and Instagram and all things virtual. And so it is something of the past inpatient like in person stuff. So I'm really excited about this virtual shadowing that I'm doing. I'm that I'm going to be offering. I'm really excited for you guys to see it. I think you guys will gain a lot of information from it, at least like how to interact with patients and some of the tests that we may order. And then kind of some of the symptoms of various different disease processes. So that you're going to be just that like one step ahead of, you know, your colleague that may not have had that experience. So hopefully this helps and this answers your question. Please tune in tomorrow when I answer another question, I may be answering more than one question depending on how short or long that answer will be. But leave your questions in the comment section below because I am reading them and I am going through them and I am picking questions to answer. So leave that in the comment section below, go ahead and like this video, sign up and get that to university.com. Subscribe. I'm telling you guys to do a lot. Follow me on Instagram. You know the drill, you guys. Thank you guys so much for watching. I appreciate each and every one of you. You guys have been amazing subscribers. So I love you guys. I will talk to you guys next time.


Hey guys, so today I wanted to do a video on starting your first IV and I want to talk about my experience starting my first IV because I Was probably tachycardic at about 150 my respirations were probably about 35 and I was super super anxious And so I want to kind of talk about my first experience and your first experience and what we can do about our first Experiences so starting my first experience my first experience putting an IV. I was in med surge I had just learned how to put an IV in through our and got passed off through our competency and I had the opportunity presented to me in the on my med surge rotation and the this patient happened to be Probably close to 300 pounds.  It probably took me Legitimately 15 minutes to set up my stuff because I was so nervous thinking about every little step like oh my gosh Did I prime the line? Oh my gosh, did I do this and? I was so nervous and I'm trying to like talk to the patient through it too and Actually, the patient kept falling asleep. So that actually made me feel a little better I was like, okay if they're falling asleep then They're probably like not that nervous because if they're nervous and I'm nervous It's just not gonna be a good thing if we're both nervous. So I had my instructor there and I remember I did it in the patients left AC and I put my first needle in and didn't get any flashback nothing and so Ended up pulling that one and the instructor said, you know, let's try again So I ended up doing it again, and I actually got it. It had to have been pure luck I had no idea like what I was doing, you know, I have idea of the steps But I mean really I had no idea what I was doing and I got it and my instructor was like super impressed because She was like expecting me to probably not get it because it was a difficult stick But I apparently aimed and got something and got that little flashback and I just remember all I was like, please Let me see that flashback. Please. Please. Please. That's all I wanted to see that flashback I could put and I did it and I got it in which was a good first experience because you know, you know Always get every stick. So that was my first experience I think most people have similar experiences as far as you know feeling super super super nervous the first time putting an idea and it's a hard Skill to get comfortable if you have to do it a lot to really get comfortable with You know being able to poke someone with a huge needle And you know learning that you have to have to go kind of quick and you don't just slowly slide the needle and you kind of have to jab it and It's just all like the dexterity of it So if you can practice a ton in your clinicals or like in your labs at school That is what I recommend because just getting the dexterity of it and what you do when you pop your turn to get and the flow of it Helps a lot. So that way when you're in clinicals, you feel a little bit more comfortable with the process of it now it's just actually doing it on a human and don't be afraid to do it in clinicals once you're able to Do it even if it's a hard stick. Who cares? You know if they're hard stick, then you know, you're already going into it You know there are hard sticks if you don't get it. Well, they were hard stick Most people would have a hard time sticking them anyway, and if you do get it, it's like, oh, wow Maybe I actually know what I'm doing So, you know, it's just something you have to practice and you know It's a good skill to have in your toolbox, especially if a patient's IV goes bad or they need an emergent one or something Like that to be able to do it quickly And you know just because you're not good at IVs or maybe not as proficient as it doesn't mean you're a bad nurse But again, it is a cool school Skill to have so anyways if you guys have a first IV starting story leave those stories in the comments Below give this video a thumbs up and subscribe to my channel and I'll see you next time. Bye


What's going on everyone? Sam here with late in sports cards, ripping two boxes, a 22 Panini Immaculate WWE hobby for Joseph S. Good luck here Joseph, let's do it buddy. His face over there, jeez. That's just looking at nothing. Lacey Evans, first base, that is 32 out of 40. First hit is gonna be 92 of 99, that is Jimmy Uso, Immaculate standard. Jake is thinking about baseball stats over there. Got really cool one here, shirt relic, that is gonna be a boa, 10 of 30. Nasty patch on that, mighty Joe Young. This is kinda gross. Seven of eight, how about patch auto of Drew McIntyre? Awesome patch on that thing man. Grats on that one there, Joseph, shoolish Jake Jackson. Got 14 out of 99 is Million Dollar Man, Ted DiBiase. Ted DiBiase, Million Dollar Man, congrats on that one, Joseph, nice one. Love how he signs with the dollar sign in there too, that's cool. Then we've got 73 out of 99 is Rhea Ripley. Rhea Ripley on the memorabilia auto, McIntyre. You can probably mag that one if you want, easier. I was just the top of where it came from. How can I more efficiently look at baseball reference? That is what Jake is thinking of. Really memorize the 2013 outing on September 14th of John Banks. Ooh, that's big. Can mag this base, this is huge actually. That is gonna be a triple H, five of five. Big time hit there, Joseph, congrats man. These base can go crazy sometimes too. That's big, that's awesome. Next episode of Stump the Jake, gonna be a revenge sure. I have not, Forrest, I have not. That is Matt Riddle, 25 of 99. Matt Riddle on the Matt Relic. Russell Mania, 38.92. This is cool, on the shirt Relic. It's gonna be 23 out of 50. Happy Corbin, August 31st, 2013. It was Jake PB versus John Banks, wow.  What a match up that is. Brad Penny, that was an individual. Brad Penny dude. We've got a nice one here, 50 out of 60 is Miko Sadamora. Miko Sadamora, marks of greatness on card, that's cool. That's a really cool auto. Got 12 of 49, Shadow Box, that is a Max Dupree. Have to celebrate the 10-year anniversary of that. Was Jake PB a Red Sock at that time? He must have been, because where else was he, the Padres? Padres and Giants. Giants, yeah, there's a has to have been. And nice last one here, signature moves, 62 out of 75, Bre Bella. 100%, Bre Bella, 62 out of 75. Nice one there. That'll do it for your break there. Joseph, thanks again for the support buddy. We'll get him right out to you.


ng those I mean the the problem with this The problem with presenting lots of models like this to you is that there are lots of decision points baked into each line of this So yes, that's right assuming that for example In fy 22 You're comfortable with those two sale those two local options taxes and a main street set aside and implementing impact fees So see those revenue lines on three four on On the three box and the four box So each of those require another decision point right like the tip funding set aside, right exactly So when we get out, this is really different though than the last numbers we saw I mean from an increase of tax base increase perspective I think on the last one we assumed I think we didn't carry that revenue forward on the last model Who's 13 percent last time? So it's 13 percent if there's no new revenues. Yeah, if there's no offsetting revenues, right? and are all are we essentially capturing all of the new revenue that may be out there That's what we're attempting to do a few other ideas. We are all ears for these projects and there's a phasing Yes to it. Yes. Also, the main street is happening over two phases rather than all at once And what's the 50 percent tip funding set aside so does that mean that 50 percent of the Funds coming in from the tip at that point could be available for other purposes Right. So we're not consuming. Sorry the entirety of the tip Exactly Exactly, and then it steps down. You'll see over time as well. So one of the things So in box one In phase two for main street, you see the debt not picking up until FY 25 i.e. when the tip expires Um, and then using that tip set aside. So in FY 25, assuming all goes well We'll have about 1.2 1.3 million dollars returning to the general fund So what we're the decision point of this line is do you want a future commit? 50 of that revenue To this debt service and then step it down Over time as outlined You know, I looked at this the thing that I did was circle the The places where I thought there was the most of all potential volatility in the modeling As to where to try to identify the risk And I think you know for me it's It's four, right? It's the items grouped in four With that being said they're also Not the largest sources of funds So I I just when I looked at this I went in with A plus or minus a percent, you know attitude When it came to both of these tax impacts and the zeros further on You know personally, I walked away I mean, this is tremendous from a just general perspective If these actually come to fruition, this is tremendously good news And it's a very vastly different revenue Picture than I think we started with I know it is So try to pull back some of those other ones and understand where my disconnect was coming from the tax rate perspective, but I guess I'm I found the loose margin there to be pretty comfortable when it comes to four and was not the concern of that And then I guess I'll just close off to say that I think We invested in creating the tip to create infrastructure that would help the city grow and thrive And it's done that it's done its job And it's going to create revenue a revenue source now that I think the responsible thing to do with it Is to reinvest it in the that same line of investment because But for us doing that our city would be in a really vast a different place financially And from a sustainability standpoint, who knows what it would look like here So I think trying to double down on that investment to do a very similarly Purposed project is Is exactly what that morally to make calls for And to not just have it dwindled into operations eventually etc. I think reinvesting in hardscape is the right thing to do Because that's how it got there. That's how the egg was created So I agree with the tiff modeling is That's a long way to say that um, I also I feel similarly that reinvesting part of that makes sense and is the logical thing to do with some of that money I like We can get into like numbers later. I don't know half seems fine to me on hand. Um I do want to discuss the local options tax though You know, we've talked about this before that we I think we've said that we pretty much on board this broken community. It's already kind of been really before before but I recall discussing a one percent increase And I I don't know this offhand, but I believe that's what we are surrounded by Oh, sorry. That's my fault So these all are one percent the two percent is year-to-year growth So assuming two percent increase in the revenue It is all one percent It's a one percent local option sacks on rooms, meals, and alcohol and a one percent Local option sacks on sales Yeah, we're not legally allowed to do anymore. Yeah I thought we were doubling that suddenly. No We're just assuming that receipts will increase by two percent a year Okay, that makes sense. Thank you I support a local options sales tax for rooms, meals, and alcohol And we'd like to see that move forward. I don't support a local options general sales tax Can you speak to your feelings behind that? Yeah, I think in general I think sales tax is something that's pretty regressive that it's people who Are less economically and franchised Harder than it does people who have more spending money To me it's more palatable if it's stuff like rooms, meals, and alcohol, which is generally That's money people are spending out of an expendable budget Whereas if we're taxing toilet paper and tuna fish That doesn't feel that doesn't feel right to me Um, and I know it's not significant. You know, it's you can look at You know, three cents on a can of beans and be like that's not significant But having watched when I you know like, you know A lot of my neighbors going in and buying a can of beans with pocket change Like it it has a significant impact on people. So This is something I can't get on board with Is there any ability to carve out groceries? I mean there's I don't believe there's a sales tax on food. Yeah Because we have a lot of like boutiques In town or high-end The services that I would not want to Exempt those particular businesses from contributing to the infrastructure needs of the community I heard about the journals But if they're not, if they're not a restaurant basically, I mean we're basically hitting the Restaurants at Potentially Hotel And not the The new crop of businesses that's Growing So, um If this is something that we move forward We I will provide you we didn't provide for you today a comprehensive overview of what's included and what's not included Um, or a historic breakdown of this over time. Um, I will we will be sure to do that in advance of any vote This is this is mora. Like yes, we would entertain a conversation or no, don't don't bring it to us And I the tax department issues of almost annual clarification memo on this because there's always something new that some people are taxing other people I can tell you Property management for examples when those things it's been a big thing or some cities apply it to that and some don't and it's You know fight back and forth. So it's a bit of a moving turk. So I think some education on that would be great Because we've spent time on the rooms mills and alcohol on peace but less time on the sort of general broader sales There's in the end We're talking about Revenue need and you come from somewhere. So it's if it's not there It's going to go back into this bottom line property tax impact And I think too that's then is going to become the The conversation because I don't like hitting anybody with taxes, but it's I'm trying to find that balance. So maybe having a better understanding of what its actual ramifications would be on Exactly what goods and for services because there are some services that are considered transactional. I don't know Right. It's complicated I think you know some of the tax department I may have used him last week um The a huge caveat to this as well and I and I we're not going to have clarity. I don't think on this The impact of this to winewski yet Is that with the new cloud taxation the sales to local option sales tax also applies to anything that's delivered to winewski Um, and that and that just started So when I look at the receipts data, you know, the numbers that are based here are based on the receipts from fy 18 Those weren't included. You know, the amazon deliveries weren't included in those receipts And we're not going to have a good projection of that at this For another whole year So I don't know if that would increase this sales tax number by 20 percent or by 100 percent. It's How much amazon delivers or You know what i'm saying about the cloud taxation Yeah, the other thing that would be nice is if you could just make mention of airbnb Um, and our ability to capture taxes on that so that airbnb's are do um Are taxed from a rooms meals and alcohol perspective But again, that hasn't got that hasn't been in place long enough to see reflected in the receipts So right now if you look at the rooms meals and alcohol receipts data on the tax department website for fy 18 There is no rooms tax Collected and winooski because we have no hotels and they hadn't implemented yet with airbnb So we that's again an unknown similar I don't think of any other additional sources in life I mean the other thing we've talked about before is a Taxi or car service registration fee to operate within the city's compliance Which berlington runs a registration program? And we've kicked around this concept of a joint regional Thing To do that in case you want to do another regionalization project just on the fly Um, what is that? Yeah, so uh vehicle service a vehicle service registration tax So it requires anybody doing a car or vehicle for hire to pay a registration for your tax or something Okay. Yeah, and so There is one in berlington, right? They have to pay a licensing tax I think my gut has always been that that's an arbitrary thing for enforcement It's not a moneymaker because the work that needs to be done and set it up is probably in that negative but Just throw that out in the course of these taxes It might be something worth a quick look I think that is interesting to think about for down the line I wouldn't Particularly be interested in discussing that at the same time as these It's a whole new work project. Yeah I find this number to be pretty palpable given what we're talking about doing And I find the revenue structure to be generally something that um I agree that the answer to those questions about the sales tax is Are there other things that we need to be brought back to report in this discussion? Better I just have a clarifying question about the the Revenue for the pool It's it's a constant Uh figure is that just the the 15 year period divided by 15? Why wouldn't that show any kind of I have a spreadsheet that complements that We did not update the revenues from the pool from the last model I can send you that that Pool revenue projection um I think that is I think what we're trying to do is be conservative with the revenues on that and we did not Put my inflation factor on it, but I can send you that that I'll still out to the other thing you do by not going over 50 in the tip is if you have to hit something in an emergency situation where one of these other revenue streams fail that You got that Other questions comments concerns or items that could help inform this conversation for the next time it comes to us I think the resulting resounding commentary is that you guys did a really great work with both of these things And spreadsheets and thank you very much What a dominant excel Questions comments concerns from the public It's really fun to listen to john and angela talk I love excel Okay, item i fy policy priorities and strategy update economic vitality. Thanks for visiting john Thanks john So being that it is 10 of 9 I I would love to hear from you If there are specific things within the memo that I have given to you that you would like to hear me talk about I did have a plan that involved going over Progress on the three priority strategies and then a brief discussion of the windewski small business zone But I am open to whatever would work best for you this evening. May I make a suggestion? Yeah Because our next meeting is really going to be focused on the tiff global settlement Which includes parking and the tiff build out We skip those you have the updates here in front of you I would like heather to share the analysis She's done on the local parcel parcel business parcel data analysis that we talked about in the strategy and then small business Zone program. I think if we just hit those two those are kind of the new things that Um, okay, so I have completed the parcel analysis for downtown and the gateway businesses And I really want to make the point that that's not all the businesses in the city And especially that some of our largest employers are up on tygen That's about a third of the total citywide jobs up on tygen. So we are not talking about all of the businesses but In looking at Local ownership, I found that we have 21 percent through downtown and the gateways that are windewski based ownership 84 percent jitney kelly ownership and 95 percent vermont ownership So we do have a high percentage of locally owned business in the city um, I think it's really important that we balance our efforts on both Maintaining those opportunities for the small entrepreneurs To start businesses for local residents start businesses, but also to maintain those employment opportunities that may not be locally owned but our opportunities for our residents as well So I've given you a few Recommended resources that I would say would be useful in creating opportunities for locally owned business startups One of them is the first one is supporting a co-working space that's looking to come into the community And one of the reasons behind that is because we actually have a really high percentage of Windewski workers who work from home. It's 7.4 percent Which is a lot higher than chitening county, which is I think 4.9 or something like that and burlington is 3.3 So it's an unusually high percentage I'll talk with you in a few minutes about possible revisions to the windewski small business loan program to better utilize the funds I think we should be hosting some of our partner organizations to bring together small business development centers score cboa women's small business program and center for women in enterprise to have workshops in the community So instead of reinventing the wheel here, I can bring in partners and offer those opportunities to our community I would certainly recommend creating a business startup guide. Ultimately, I would like that to be an online something That's online as well on our new website In Syracuse, I did an annual retail recruitment event and that was where I pulled together All of the businesses that have expressed any interest in coming into Syracuse as well as landing institutions leasing agents business owners that they could tell about their successes downtown organization score Sba and other small business development partners as well as city staff. So you could kind of it was, you know One-stop shopping So I would recommend doing something along that line Providing a commercial space locator on the economic development page of the website, although right now it means it's pretty easy because There aren't that many spaces So I kind of have them in my head but having that available online So someone at three o'clock in the morning thinking about wanting to start a business doesn't rule out when you skip Because they can't look us up Providing support to businesses throughout the main street project And also I'd recommend that I'd like to attend An economic development and international economic development council training entrepreneurial and small business development strategies this year So those are my baseline beginning recommendations If any of you are interested in how The local business parcel analysis breaks down Based on different gateways or the downtown or any of that I have that information as well. Happy to share it Could you? Yeah, absolutely. Absolutely So downtown businesses are 15 percent Winooski based 79 percent Chittenden county ownership and 97 percent Vermont ownership East Allen gateway businesses are nine percent Winooski based 91 percent Chittenden county and 91 percent Vermont ownership Mallets Bay have has the highest Winooski based ownership and the highest Vermont ownership at 33 percent Winooski based 83 percent Chittenden county based and 100 percent Vermont ownership Main street gateway businesses break down as 29 percent Winooski based ownership 87 percent Chittenden county and 94 percent Vermont ownership So I'm going to move on if that's okay to the small business loan program discussion At this point I have Recommended that actually now it's 10 businesses. It was eight. It was at the time that I wrote this but 10 potential businesses or existing businesses Apply for the Winooski small business loan program Only one of those was eligible for that program because we can only fund Tier three loans based on the way that the memorandum of understanding was written So we can do buy downs of the lower risk loans at tier one and tier two But it's really only the highest risk loans that even get to our program for consideration If they qualify for those higher tier loans, then they're just funded through opportunities credit union So my recommendation would be that we move forward and talk with the Small business loan committee about the possibility of coming back with a recommendation for you For a certain percentage of the funds that are made available for interest rate buy downs specifically Which would then make all Winooski businesses regardless of what their credit history is in some way eligible for the program So anything coming through would then be considered for the Winooski small business loan program if it's a Winooski business And Well, we'll get to that when we get there. I think it's great that you guys are thinking about it Just something that I'd like to discuss with the committee and come back with a recommendation I don't have a specific percentage in mind But I wanted to touch base with you and see what your appetite was for us to look at that because right now We're not using it to support business at all. It's just sitting Right and previously there was a council that wanted to hold very tightly To the idea that the money needs needed to regenerate itself Which in a situation where you're just buying down interest. It doesn't right it goes out. It's a direct cost But we have money to spend it. It's always been kind of the balancing conversation discussions And that's why I would recommend a percentage of it. So we know some of it is still evolving But you know, there's a certain amount that we're willing to that's great. Yeah What do you think that demand is for such I think if we were doing interest rate buy downs, we would have more takers on that I definitely think there are some businesses that would have been interested in that but Knowing that they're eligible for a tier one loan and you know, we just end up with an opportunities loan They're not as interested in going for that program. So, um If you go earlier to the memo, yeah, the council's priorities and policies discussion where we talked about using rate city resources Yeah To create employment opportunities for residents that expand availability of goods and services for residents So I guess I'd be interested in I'm I'm I guess a philosophical issue with making public funds available to any Small business owner without consideration of the public good So I would want to see some connect connect So we right now we tied it to Risk or you know the inability to secure financing because your credit wasn't And maybe that wasn't the right criteria to look at but I don't I don't feel comfortable abandoning all criteria and just say First come first serve if you're no matter whether you're a high-end You know serve it, you know, whatever providing goods and services that You know are available to a small slice of the community versus Well, you know What we heard through that process where you know members of the community have certain businesses that they are really Feeling a need for So how do we make that connection between public funding from some shared public good? We do still have the criteria that are used to evaluate the loans So I think those criteria and I I don't have them in front of me. I apologize for that but Those criteria would still apply to the interest rate buy-downs at least that's the way I'm imagining it So we've already established that it has to be meeting these certain needs in the community. So higher scoring Interest rate buy-downs would then be eligible or could even set some see that together. Yeah Because that was a while ago. Yeah, that was March Yeah, the scoring matrix and if you go with that model where that's prioritized We might want to think about an open season an open and closed state for an rfp I mean, and I'm just gonna idea this again I was also just gonna say too if the committee thinks that they need to To get to use it, you know, the state's done a lot of analysis recently on their evolving loan funds and come back with the conclusion that grant a portion of grant injection is necessary To get mostly or all of us to go the revolving loan funds to be used So the state is now Putting grant funding into almost all of our loving loan funds that it's utilizing for housing and economic development And that's something that just changed like Last year and this year So they're saying basically to get people to take the $15,000 in loan We need to give $3,000 in a grant, you know So yeah, if they want to if they have got good reasoning and rationed through that when they start to review this To propose something to the back. I just we might not go for it But I would encourage them to think outside of the box and how you get the funds utilized too. Great. Thank you Not feel wed to this This was just something I threw together What else That's helpful. I think that gives us some Yeah, that absolutely gives us some guidance and it's something the grant percentage is something I'm familiar with in Syracuse and we might have specific things that we want to incentivize with that So for example, we could have that percentage be a facade grant or you know, something that would provide a direct benefit When previously for example opportunities was able to pair revolving loan fund through one entity with a grant fund from a yackel foundation that provided Upfront grant injection towards new american families or purchasing farming equipment to Work with new farms for new americans and to order cash machines and registered management business management tools So they took a loan, but there was also a grant component too. It was really helpful Also, just to speak highly of a partner and I'm sorry and I will disclose I used to work there, but if you haven't been the opportunities web page recently You should go there tonight after work because I think like the five major Businesses that they they're highlighting from a funding perspective are all musky businesses Which is pretty cool. That's That has an entity that the city fought very hard to get to come in here and it's You'll get some good results This is a great job on the update overall too. Thank you for all your work And I know it's not reflective of the housing Work and everything else that's going on So I really appreciate all the all the thought that went into it and the work that's been done. Thank you Thank you other questions comes concerns for heather and jesse on the academic sexuality report Okay, so top two take backs for st. Michael's class. What are they gonna be? I Okay, that concludes tonight's uh regular agenda and entertain a motion adjourn Motion by Nicole second by Erick. Any further discussion? So you can hear none of those in favor please say aye. Aye. And those opposed motion curious


So let's take a simple example, the combustion of hydrogen in oxygen to produce water. Let's first write out the formulae of the substances. We know that hydrogen and oxygen are part of the diatomic seven, so we can write them as H2 and O2, and water is H2O. So we can write the skeleton of our equation like this. Now let's draw some diagrams of our molecules so that it's easy to see the individual atoms. We'll draw a hydrogen molecule and an oxygen molecule. You can see each of them is made of two atoms joined together, bonded together, and they will somehow combine to give water. Okay, let's do some atom accounting. As we've drawn them, we have two hydrogen atoms on the left and also two on the right, here and here. So we're okay for hydrogen. No hydrogen has mysteriously disappeared or been created. But what of the oxygen? On the left we've got two oxygen atoms, but on the right we only have one, so our oxygen atoms are not balanced. There are two ways that you might deal with this. One would be to change the formulae of water. Let's make it H2O2. Then we've got two hydrogens on the left and two on the right, and two oxygens on the left and two on the right. Can we do this? No! We cannot do it. And the reason that we can't do it is that by changing the formulae, you completely change the compound. H2O2 is hydrogen peroxide, a highly reactive bleach.  It might help to try reading this out loud if you're having trouble getting it. Okay, so when hydrogen and oxygen react, you don't get hydrogen peroxide. You get water. And water is H2O, and so the H2O has to stay H2O. Never change the formulae of your compounds. So how else can we get another oxygen there on the right? Well, the only other option is to have another water molecule. Now our oxygen is fine. We've now got two on the left and two on the right, but our hydrogen is unbalanced. We've got two on the left and four on the right. So what do we do? Well, we just need a little more hydrogen on the reactant side. And now we're good. We've got four hydrogens and two oxygens on the left and four hydrogens and two oxygens on the right, but rearranged this time into two water molecules. The final thing we need to do is show these adjustments in the reaction equation. And the way that we do this is by using large numbers at the front of each of the formulae to show how many of each one there are. Now let's start with the oxygen. We have only one oxygen molecule, so we actually leave it blank. The tradition or the convention is that if there is no number out the front of the molecule or the atom, that just means that there's one of them. If there's more than one, then we have to indicate it with a number. So for our hydrogen molecules, we have two of those. So we indicate that with a large two. Two hydrogens plus one oxygen gives and we have two water molecules, so we put a large two out the front there as well. Now if you want to check that your balancing is correct and you don't want to be bothered actually drawing out pictures of all the atoms and molecules, then the way to do it is to scan through your reaction equation and do some simple maths. So again we're checking to make sure that the number and type of atoms on the left is the same as on the right. So we'll check the hydrogens first. On the left, we have an H2 molecule, so that's two hydrogens in one molecule, and we have two of those molecules. So two times two is four hydrogens on the left. And if we go over to the right, we find we have in a single water molecule, there are two hydrogens, but we have two water molecules, so again it's two times two which is four hydrogens. So four on the left, four on the right and we're balanced. For oxygens, on the left we have one oxygen molecule and that molecule is made up of two oxygen atoms, so that's two O's. And on the right, each water molecule has a single oxygen atom and there are two water molecules, so that's two oxygens. So our oxygens are also balanced.


Item number SCP-149 Object Class Keter Special Containment Procedures SCP-149 in any of its instances is to be kept inside a sealed plexiglass box for observation. Oxygen and a nutrient mist are to be released into the containment cell every two hours. If any instance of SCP-149 escapes its cell, Protocol 42 Charlie is to be brought into effect on any and all contaminated personnel by order of O5-12 after Incident 149-1. Description SCP-149 is a breed of mosquito which carries a strain of retrovirus, herein referred to as SCP-149A, that mutates regenerating human cells into fertilized mosquito eggs. SCP-149A is injected directly into the bloodstream when SCP-149 feeds. The SCP-149A quickly works on the nucleus of the cells, warping the DNA. The first set of cells bred from these changed instructions closely resemble cysts and are concentrated in the lining of the esophagus and the sinuses. One dissection however, these cysts are revealed to be filled with SCP-149's larvae, the cysts acting as a protective casing against external forces. SCP-149 appears to go through its maturation cycle in a matter of hours. By the time the subject is able to feel any effects, the first generation of SCP-149 has already grown inside the subject's body. SCP-149 primarily achieves exodus through the mouth and nostrils, occasionally being diverted through the sphenoid sinuses to escape through the eye sockets. Infection by SCP-149 is fatal and chance of infection has been estimated to be 50% from one bite. Addendum, Incident 149-1. When incidents of SCP-149 escaped and infected multiple Class D subjects, the majority of whom did not report SCP-149's contact with them. Within five hours, SCP-149 had matured in these hosts and burst out of them, infecting several staff members. It was only thanks to the quick thinking of Dr. Pratt, who sealed sub-levels 12-15 that the entire site was not infected. As a response to this, O5 Command has created Protocol 42 Charlie to be used if SCP-149 escapes confinement. Lesson complete. If you missed the previous orientation, go watch SCP-148, the Telekill Alloy, right now. Or for the complete course, watch this playlist.