Assalamu alaikum students, I am Vasim Iqram. This is the 17th lecture in a series of 45 lectures on digital logic design. Last lecture, we talked about two new combinational functional units. The first was the comparator circuit, which we discussed earlier. There were two versions of the comparator circuit, one is the parallel comparator circuit where all the bits are checked and then on the basis of those bits we get three different outputs. The second one we discussed was the iterative based circuit. In the iterative based circuit, we said that there will be a module where you can make multiple copies and you can combine them. The advantage was that if you want to make a 16 bit comparator unit, then you won't have to use external logic, which you have to use in the parallel comparator. We discussed two circuits, one was A equals to B and its iterative circuit was made. The second comparator circuit we saw was A greater than B and its iterative circuit was made. We also saw examples, by connecting two modules together, A equals to B was also implemented and A greater than B was also implemented. We said we could implement a similar module using the same set of gates for A less than B. The second thing we saw was a commercially available 4 bit comparator. Basically, it is an iterative based comparator. We saw a connection of that, you can implement a 12 bit comparator by connecting three of those 4 bit chips. The next one we saw was a functional device where we discussed decoder. We said that decoder is two important functions in any computer system, in a digital system. One is that we can select different devices from it. So you have a decoder, it has multiple inputs and multiple set of outputs. By applying a certain code at the input of the decoder, one output or multiple outputs can be selected, which represents the input code. So what we discussed so far was a binary simple, binary decoder. You could have a 2 to 4 binary decoder, in which you can apply two input codes, two bit input code. Because of that, one output will be selected out of four. So that a single output can be used to select any device. The second application we used to decoder was in instruction decoding. In computer, as you know, all programs which you write are converted into machine code, in binary terms, in terms of 1s and 0s. So when you execute these programs, one instruction is fetched, it is decoded. Basically, as we said in the last example, ad is 1010. Let's say 1010 represents the ad function. So how the computer will use it? It will apply it to the input of a decoder. The output of the decoder will activate the ad circuit. So it will be added. You can do such a subtraction. You can do any other operation. We saw the implementation of the decoder circuit. We saw the function table of the 2 to 4 decoder circuit. We talked that decoders are available in different types. There are 2 to 4, 3 to 8. You can connect them in different combinations to form larger decoders. So today we will continue our discussion. Let's look at different decoders. Let's look at connections and implementations. After that, we will talk about encoders, what are encoders? So let us start our discussion by looking at the 3 to 8 decoder. We will start today's discussion by looking at the 3 to 8 decoder. 3 to 8 decoder, as the name indicates, has 3 inputs and 8 outputs. We will also look at the function table and what exactly it does. We know what it does. Basically, you will apply 3-bit input code. One of the 8 outputs will be selected and activated. This 3 to 8 decoder has 3 chip-enabled input pins. The first 2 to 4 decoder had only one chip-enabled pin. Now this has 3 chip-enabled inputs. This allows multiple 3 to 8 decoders to be connected together to form larger decoders. For example, you can connect 2 3 to 8 decoders to form 4 to 16 decoders. That means it has 4 inputs and 16 outputs. So by applying a 4-bit code at the input, you can select 1 out of the 16 outputs. Let us have a look at the function table which describes the operation of the 3 to 8 decoder and then we will have a look at the circuit diagram where we connect the 2 3 to 8 decoders to form a 4 to 16 decoder. Let us first look at the function table of the 7, 4, LS, 1, 3, 8, the 3, 2, 8 decoder. As seen in the function table, there are 6 inputs. G1 input, G2A bar input, G2B bar input. These 3 inputs are the chip-enabled inputs. G1 is active high, G2A and G2B are active low. CBA are the data inputs or the code inputs which allows us to select 1 out of the 8 outputs. There are 8 outputs Y0, Y1, Y2, Y3 up to Y7. All are active low. Now to operate the 3 to 8 decoder, all the chip select pins should be activated. So, G1 should be set to 1 because it is active high, G2A should be set to 0 because it is active low and G2B should also be set to low because it is active low input pin. Any other combination would not enable the chip as can be seen by the first 3 rows in the function table. Now by enabling the chip, you can apply 3 bit code at the inputs A, B and C. So, by having 0, 0, 0 at the inputs A, B, C, Y0 output is selected. Since it is active low, therefore you see a 0. All the remaining outputs are 1. Similarly, by having the input code 0, 0, 1, Y1 output is selected by selecting the input code 101, Y2 output is selected and so on. Finally, if you have the code 111, Y7 output is selected, it has a 0. Remaining outputs are 1s. Let us now look at the implementation of a 4 to 16 decoder using 2 3 to 8 decoder chips. Now the inputs A, B and C of both the 3 to 8 decoders are connected together. Looking at the 3 chip enable pins, the G1 enable pin for the first decoder is connected to 5 volts. So, it is enabled. G2A and G2B, the active low enable pins are connected to the D input and an enable input. Looking at the second 3 to 8 decoder, G1 enable pin is connected to the D input. G2A and G2B, the two active low pins are connected to the enable input and ground respectively. Now let us look at the function of the 4 to 16 decoder. Let us suppose you apply a 4 bit code 0, 0, 0, 0. All 4 bits are 0s. Now the 0 at the D input would activate the first 3 to 8 decoder, the decoder shown on the top. Whereas the lower 3 to 8 decoder would be inactivated because you have a 0 at the G1 enable input. Which output would be selected? Basically it depends on the input code at inputs A, B and C since it is 0, 0, 0. Therefore, Y0 output would be selected. It would be 0 as it is active low. Outputs Y1 to Y7 would be set to 1. Similarly, outputs Y0 to Y7 of the second 3 to 8 decoder would all be set to 1 because that particular chip has not been selected. Let us suppose you apply the code 1, 1, 1, 1. All 4 bits are set to 1. Now looking at the D input, it is 1. So the top 3 to 8 decoder it is not selected because G2A has to be active low. Looking at the bottom 3 to 8 decoder, G1 is connected to D. Since D is 1, therefore G1 is activated. G2A is connected to the enable pin. It is set to 0. So it is active again and G2B is permanently connected to ground. Therefore, the second 3 to 8 decoder chip has been selected whereas the first 3 to 8 chip has been deselected. Now what is the output state of the 3 to 8 decoder? Since A, B and C are all 1s, therefore Y7 output is activated. Y7 output of the second 3 to 8 decoder. It would be set to 0. Y0 to Y6 outputs would be set to 1. Similarly, the Y0 to Y7 outputs of the first decoder would all be set to 1 indicating that it is inactive. We have looked at the function diagram of a 3 to 8 decoder. It has 3 inputs and 3 chip select inputs and of course 8 outputs. We have also seen the implementation of a 4 to 16 decoder using the 2, 3 to 8 decoder chips. Now one interesting thing which can be done by using these 3, these decoders 2 to 4 or 3 to 8 decoders is to implement a function generator. Well how do we implement a function generator? Let us suppose you have a 3 variable function table. So 3 variable function table would have input variables A, B and C. You have 8 possible input combinations. The output would be of course a single column representing F, the output. Let us suppose the first term, mentum 000 is set to 1 and the last mentum 111 is again set to 1. So how would you implement this function? Well you can use logic gates. Now this same function can be implemented using a decoder. Let us consider the 3 to 8 decoder. The inputs are connected to the 3 variables A, B and C. Now let us suppose you apply the code 000. What happens? The output Y0 is going to be activated. It would be set to 0 whereas other outputs would be set to 1. Similarly, if you apply the combination 111 at the input of the 3 to 8 decoder, what happens? The output Y7 is going to be selected. It is going to be set to 0 whereas the remaining outputs would be set to 1. Since we are interested in implementing the function table which has only 2 mentums for 000 and 111. What do you do? Basically you connect a NAND gate at the output of the 3 to 8 decoder. Why NAND gate? Basically if you remember the 3 to 8 decoder has active low outputs. So if you are going to be implementing a function in terms of sum of products. So 000 represents a product term. 111 represents another product term. Now both these product terms have to be odd together. Now how would you set the active low outputs to active high? You would add 2 inverters or you would connect 2 inverters at Y0 output and Y7 output. And then you would connect a 2 input OR gate. What is the end result? What do you get at the output of the OR gate? Basically it would be a 1 when you apply the code 000 or the code 111. For all other codes the output would be a 0. So basically you have implemented a simple function generator based on SOP sum of product terms. Similarly you can implement a function generator based on product of some terms. If you just consider that same function table where the term 000 gives an output of 1 and the term 111 gives you an output of 1. How many max terms are there in this function table? Basically 6 max terms starting from 2, 3, 4, 5 and 6. Now if you look at the 3 to 8 decoder if you apply any of these 6 terms 2, 3, 4, 5 and 6 the output would be 0 at the respective output pins. Now if you connect an AND gate. AND gate is basically performing the product of some terms. The output would be a 0. Let us have a look at the implementation of a function generator using these 3 to 8 decoders. Consider the 3 variable card of map having the max terms 0, 1, 3, 5 and 7. How is the Boolean expression going to be implemented using 3 to 8 decoder? The 3 variables A, B, C are directly connected to the inputs A, B, C of the 3 to 8 decoder. The G1 chip select pin is permanently connected to 5 volts logic 1. G2A and G2B the active low chip enable pins are grounded. So the chip has been enabled. Now when the code 000 is applied y0 is going to be selected it would be set to 0. When the code 001 maximum 1 is selected y1 output would be activated. Similarly, when the maximum 3 0, 1, 1 is applied at the inputs A, B, C y3 output would be activated. And similarly for the maximums 5 and 7. Now by connecting a 5 input AND gate to the inputs y0, y1, y3, y5 and y7. We have implemented a POS based Boolean expression product of some form of the Boolean expression. The function table can be implemented in the form of SOP, an SOP Boolean expression by using the same 3 to 8 decoder. The input variables A, B, C are directly connected to the 3 inputs A, B, C of the decoder. The chip selects are set to or connected to 5 volts, 0 volts and 0 volts. The min terms defined by the function table are 2, 4 and 6. Therefore, when 010 code is applied at A, B, C for min term 2, y2 output is going to be selected. Similarly, when 4 is applied at the input of the 3 to 8 decoder, y4 output would be selected. And when a 6 is applied at the input of the 3 to 8 decoder, y6 output would be selected. Now all 3 outputs are connected to the input of a NAND gate. Basically NAND gate, if you have a look at the alternate symbol for a NAND gate, it is an OR gate with 3 bubbles at the input, meaning 3 inverters. The 3 to 8 decoder has an active low output. So, by connecting 3 inverters at the input of the OR gate, the 3 active low outputs are being converted to active high. So, basically by connecting a NAND gate, some of product implementation of the function has been carried out. We have just looked at the implementation or rather the use of 3 to 8 decoder to implement Boolean expressions both in the summer product form and the product of some form. Up till now, the decoders which we have looked at the 2 to 4 and 3 to 8 only activate a single output. For the 2 to 4 decoder, when you apply a 2 bit code, only 1 out of the 4 output is selected. Similarly, for a 3 to 8 decoder, when you apply a 3 bit input code, only 1 out of the 8 outputs is selected. Now, we had studied the BCD to 7 segment decoder. BCD to segment decoder basically it has 4 inputs representing the 10 BCD numbers and for each combination of BCD numbers, multiple output segments are activated. For example, you need to display the number 0. So, the BCD code which we will apply will be 0, 0, 0, 0. Which segments will be activated? All segments will be activated except for the segment G. Similarly, if you want to display 7, so you would apply an input of 0, 1, 1, 1 representing BCD 7. What will happen on the output? Segment A, segment B and segment C would be activated. The rest of the segments would remain inactive. So, in the first case, your 6 segments are activated. In the second case, 3 segments are activated. So, multiple outputs are being activated. Now, if you remember BCD to 7 segment decoder, we saw the function table. In the function table, we had 16 possible combinations because we had 4 variables representing the 4-bed BCD and we had 7 outputs, one for each segment. So, A, B, C, D, E, F and G, 7 different outputs. We derived Boolean expressions for each segment. For example, we saw for segment A and B and G. Now, we can directly implement circuits which generate or which activate the output of segment A to 1 or set it to 1 when the number 0, 0, 0 is applied, for example, or the number 7 is applied. So, similarly, for segment B, we can make a circuit. Whenever we apply appropriate numbers on the input, segment B should be set to 1 and similarly for all other segments. One way is that you have to choose logic and implement it. The other easy way to implement this BCD to 7 segment decoder would be to just buy a chip which is commercially available. So, the 4-bed BCD to 7 segment decoder chip, it is the 7, 4, 4, 7. Of course, it has 4 inputs and 7 outputs. The 7, 4, 4, 7 BCD to 7 segment decoder chip in addition to the 4-bed input and 7-bed output has certain other inputs and outputs. Now, these extra inputs and outputs allows the BCD to 7 segment decoder to control the display digits. Basically, if you display a fraction such as 23.71. Let us suppose you have 3 digits which represent the integer part and 3 digits to represent the fraction part. So, 23.71, when you display, what should be the most significant digit? Basically, nothing should be there. It should be blank. Similarly, after 7, 1, the least significant digit should be blank. So, these 3 extra inputs with BCD to 7 segment decoder basically, these trailing zeros should be controlled. If a number has trailing zero, it will not be displayed. Similarly, if zeros are coming from a number, it will not be shown. We are not going to look at the actual implementation of the circuit inside the BCD to 7 segment decoder. But just to recap, the first equations or Boolean expressions that were derived in segment A, B and G, let us look at them again. Let us also look at the implementation using simple logic gates. The Boolean expression representing segment A is A plus C plus BD plus B bar D bar. The circuit implemented using this expression has a single OR gate, two AND gates and two inverters. The Boolean expression representing segment B is B bar plus C bar D bar plus CD. The implementation of this expression is through a single OR gate, two AND gates and three inverters. Similarly, the implementation of segment G is A plus BC bar plus CD bar plus B bar C. It uses a single OR gate, three AND gates and three inverters. Similarly, you can have expressions for other segments and each segment can be implemented using OR gates, AND gates and inverters. Now, most of these segments have combinations which are used by other segments. So, you can save on these similar terms by having just a single circuit. The 7447 BCD, 7-segment decoder circuit economizes on these gates by having a single gate for single terms. We have discussed two different decoders, the binary decoder which has either two inputs or three inputs and multiple outputs, only one output is activated. We have also discussed the BCD to 7-segment decoder which again has four inputs and seven outputs. More than one output is activated on the application of a BCD decoder. We have a third type of decoder, the BCD to decimal decoder. The BCD to decimal decoder is similar to a 4-16 decoder. 4-16 decoder basically you apply a 4-bit code and one out of the 16 outputs would be selected. BCD to decimal decoder has only 10 outputs and each output represents the decimal digits 0 to 9. So, if you apply let us say a BCD number such as 11 which is invalid, no output would be selected. Similarly, 12, 13, 14, 15. If you apply the inputs, BCD to decimal decoder input, again output will not change, no one will activate. So, basically 4 inputs and 10 outputs. So, again BCD to decimal decoder get different applications. Let us discuss encoders. What are encoders? Basically an encoder forms a function which is the exact opposite of a decoder. Encoder can be multiple input sign or multiple output sign. Now, by selecting any one input, you get a code which represents that input. So, for example, if you have a 4 to 2 encoder, it will have 4 inputs and 2 outputs. Now, you select the 4th input by setting it to let us say logic 1. What will come on the output? You will have a 2-bit code 11 representing that the 4th output has been selected. Similarly, if you select the first output, the code will be 0 to 0. Similarly, if you have 8 to 3 encoders, it would have 8 inputs and 3 outputs. So, if you select the first input, the output will be 0 to 0. If you select the last input, then you would have 111 at the output. So, the output will always have a 2-bit or 3-bit code representing which input you have selected. Let us have a look at the implementation of an 8 to 3 encoder. First, let us look at the function table and see how it performs the function. Then, let us look at the implementation using simple gates. Let us consider the function table of an 8 to 3 encoder which has active high inputs and active high outputs. It has 8 inputs i0, i1, i2, i3, i4, i5, i6 and i7. It has 3 outputs o0, o1 and o2. Now, looking at the second row, i1 is set to 1. All other inputs are set to 0. i0 input is do not care. It could be 0 or it could be a 1. The output is 001. This means input 1 has been selected. Looking at the third row, i2 is set to 1. All other inputs are set to 0 and input 0 is either 0 or 1. The output shows the 3-bit code to be 010. Similarly, looking at the last row, i7 is set to 1. All remaining inputs are set to 0. The output indicates the code 111. Now, looking at the implementation of an 8 to 3 encoder, only 3 or gates are used and each of the 3 or gates have 4 inputs. Now, let us suppose i1 is activated. So, i1 would have a logic 1. What should be the output code? Basically, it should be 001. Now, it can be seen in the diagram that i1 is connected to the input of the first or gate, which has an output of o0. So, if i1 is 1, output o0 is going to be 1, output o1 is going to be 0 and output o2 is going to be 0. Similarly, looking at the input i7, when this is activated, you should get an output code of 111. So, by following the connection of i7, it is connected to the input of the first or gate. It is also connected to the input of the second or gate and the third or gate. So, whenever i7 is selected, 1 is applied at the input, all 3 or gates would provide an output of 111 respectively. Similarly, looking at the input i4, i4 should generate a number 100, o0 should be 0 and o1 should be 0, o2 should be 1. Following the connection of i4, it is connected to the input of the last gate, which has the output o2. o1 and o0 or gates are not connected to i4. Now, looking at i0, when this is selected, the output should be 0. So, in the circuit, it is shown as not connected. We have just seen the implementation of a 823 encoder, its function diagram. We have seen its implementation. Implementation is very simple. We have used 3 or gates, 3 or 4 inputs. Now, there is a problem with this particular circuit. Can you spot the problem? What could go wrong with this particular encoder? Well, the problem is, if you select two inputs simultaneously, what is the output going to be? Let us take an example. You select input 1 or input 6 simultaneously. So, because of input 1, the output code will be 001, representing the one input. For the input 6, the output should be 110. What is the output code? 1117. So, the simple encoder, if you select more than one input, the output code will not be correct. So, what should be the solution? Basically, we need to modify the circuit. What will happen after modifying the circuit? Basically, we assign priorities to inputs. So, input 6's priority is more than input 1. So, if you select input 1 and 6, the output should give the code for input 6. Similarly, if you select the input 4 and 5, the priority of input 5 is more than input 4. So, at the output, you should only see 101. Now, encoders which prioritize their inputs are known as priority encoders. What will be the logic of priority encoders? How will it be known that this input has more priority as compared to another input? Basically, simple Boolean expressions can be written on that basis. We can define a circuit on that basis. So, let us suppose, let us take a very simple example. I2 has a higher priority than I1. What will be its expression? Basically, because of I2 and I1, because of I2, the output will be 010 and because of I1, the output will be 001. So, we could write an expression based on the input I2 and I1, saying that when I2 is active and I1 is active, the output should give the code for I2. Let us have a look at the priority encoder. Let us have a look at the Boolean expressions which have been derived and on the basis of which we implement the priority encoder circuit. Let us develop Boolean expressions for the three outputs O2, O1 and O0 of a 8 to 3 priority encoder. Now, these expressions can be written in terms of some variables. So, O2 is equal to A7 plus A6 plus A5 plus A4. What do these variables represent? Basically, if you look at the priority encoders output O2, O2 is going to be set to 1 or it is going to be activated when the seventh input is selected or the sixth input is selected or the fifth or the fourth input is selected. Similarly, the expression, the Boolean expression for output 1 can be written in terms of these variables A7 plus A6 plus A3 plus A2. So, this means that the output O1 is going to be activated when any of the four inputs that is 7, 6, 3 or 2 are selected. Similarly, the Boolean expression for O0 output can be written in terms of A7 plus A5 plus A3 plus A1. That is the output 0 is going to be activated when any of the four inputs that is the seventh input, the fifth input, the third input or the first input are selected. The terms A7, A6, A5, A4 up to A0 can be written in terms of the inputs. So, A7 is equal to I7 the input. A6 is equal to I7 bar, I6. I7 and I6 are the two inputs, the seventh and the sixth inputs respectively. Similarly, A5 can be written in terms of the seventh, sixth and the fifth inputs. So, it is I7 bar, I6 bar, I5. A4 can be written as I7 bar, I6 bar, I5 bar and I4. And lastly, A0 can be written in terms of the inputs as I7 bar, I6 bar, I5 bar, I4 bar, I3 bar, I2 bar, I1 bar and I0. Now, replacing the variables A7, A6, A5 and A4 for the expression O2, we have O2 equals to I7 plus I7 bar, I6 plus I7 bar, I6 bar, I5 plus I7 bar, I6 bar, I5 bar, I4.  If the input I7 is selected, it should be set to 1. Similarly, if both the inputs 6 and 7 is selected, according to the expression, output 2 would be activated. Again, if the input I7 and I4 is selected, according to the expression O2, output would be set to 1.  Similarly, looking at the output expression for output 101, it can be written in terms of the input terms as I7 plus I7 bar, I6 plus I7 bar, I6 bar, I5 bar, I4 bar, I3 plus I7 bar, I6 bar, I5 bar, I4 bar, I3 bar and I2. If you simplify this expression, you end up with I7 plus I6 plus I5 bar, I4 bar, I3 plus I5 bar, I4 bar, I2. And lastly, the expression for output 0. It can be written in terms of the inputs as I7 plus I7 bar, I6 bar, I5 plus I7 bar, I6 bar, I5 bar, I4 bar, I3 plus I7 bar, I6 bar, I5 bar, I4 bar, I3 bar, I2 bar and I1. If you simplify this expression, you end up with the expression I7 plus I6 bar, I5 plus I6 bar, I4 bar, I3 plus I6 bar, I4 bar, I2 bar, I1. Now looking at the Boolean expression for output 1 which is I7 plus I6 plus I5 bar, I4 bar, I3 plus I5 bar, I4 bar, I2 it is going to be set to 1 if the inputs 7, 6, 5, 4 and 3 are not selected. So, the last term which is I5 bar, I4 bar, I2 would set the output to 1 because of the presence of I2, input 2. Based on these 3 Boolean expressions, a priority based circuit can be implemented. The function diagram of the 8 to 3 input priority circuit is shown. It has 8 inputs and another input which basically enables the chip. So, E1 bar is active low. It is set to 0 to activate the 8 to 3 priority encoder. The remaining 8 inputs I0 to I7 are all active low. So, in order to select an input you have to apply a 0 at the appropriate input. There are 5 outputs A0 bar, A1 bar, A2 bar representing the 3 active low outputs. There are 2 additional outputs E0 bar and Gs bar. The E0 active low output represents the enable output and Gs active low output represents the group select output. The group select output and E0 output, the enable output are used to connect multiple 8 to 3 priority encoders to form larger encoders. The 2 active low outputs are used to connect multiple 8 to 3 priority encoders to form larger encoders. Now looking at the function diagram again, let us suppose the input 4 is selected. So, it is going to be selected by applying a 0 there. All the remaining inputs I5, I6, I7 have to be A1. The inputs at a lower priority that is 0, 1, 2 and 3 can be 0 or 1. The output of the priority encoder would be 1, rather 0, 1, 1. Similarly, if input 1 is selected, it is set to 0. All the higher priority inputs have to be 1 indicating that they are inactive. The input 0 that is the first input can be either a 0 or a 1. The output would be 8, 1, 1, 0. The 8 to 3 priority encoder which we have just looked at the function diagram and implementation is basically the 7, 4, 1, 4, 8, 8, 2, 3 priority encoder. Now you can implement a larger priority encoder that is 16 inputs and 4 outputs by connecting 2 of these 8 to 3 priority encoders. So, how would you connect them? As we mentioned, you have 2 outputs and the group select output. Basically, these outputs are used. The enable output particularly is used to connect the 2, 8, 2, 3 priority encoders. So, let us have a look at the implementation. In order to implement a 16 input priority encoder, you have to use 2, 8 input priority encoders. The 3 outputs are connected together through 3 NAND gates. The active low enable output pin of the first 8 input priority encoder is connected to the active low input pin, enable input pin of the second 8 input priority encoder. Now let us suppose you select input 4 in the first priority encoder. What happens? The output shows the code 4. If you look at the function diagram, the enable output of the first encoder is set to 1, which means the second encoder is not selected. Similarly, if you select the input pin 8, which is the first pin of the second encoder, the output would be set to 8. Let us suppose that we select the input 0 of the second encoder, which means it is the 8th input of the 16 input priority encoder. What is the output? Basically the output would be 0, 0, 0, because input 0 has been selected of the second encoder. A3 output would be set to 1. Looking at the function table, the first encoder has not been selected. None of the 8 pins have been selected. Therefore, the E0 output would be set to 1. Therefore, the 4-bit code is 1, 0, 0, 0, representing the 8th input, which has been selected. Let us look at another encoder, the BCD to decimal encoder. The BCD to decimal encoder has 4 inputs, rather 10 inputs representing the 10 decimal digits, 0 to 9. And the output is 4, of course, representing the BCD number. So, where are we going to use this? Basically you have a keypad, which is placed on the telephone, the numeric keypad of the computer is also 10 digits. Now, when you press any number, you need to code that into binary or BCD, so that the rest of the circuitry can use that number. So, what will happen? Basically you would connect each of the 10 keys of your keypad to the 10 inputs of the decimal to BCD encoder. So, whenever you press any key, you would get an output BCD code, which represents the key number. Of course, this decimal to BCD encoder is a priority base decoder. So, if you press 2 keys, you would simply get a single output representing the number of the highest priority digit. The 74147 is a decimal to BCD priority encoder. It has 10 active low inputs representing the decimal digits 0 to 9. It also has a 4-bit BCD output. All outputs are active low. Now, at the 10 inputs of the decimal to BCD priority encoder, 10 different keys are connected. One end of each key is grounded and the other end is connected to 5 volts through a resistor. So, whenever a key is pressed, the output, the appropriate input of the priority encoder would be set to 0 because the key connects the input of the priority encoder to the ground. So, let us suppose key 0 is pressed. So, the input 0 would be set to 0. The output would give the code 0000. Let us suppose the key number 7 is pressed. Input at pen 7 of the priority encoder would be set to 0. The output would be 0111 representing the number 7. If none of the keys are pressed, the outputs at the input of the priority encoder would all be high. Therefore, the output BCD code would be all once. We have looked at the implementation of priority encoders and we have also looked at the application of a priority encoder. Basically, the key pad that you connect with priority encoder.  Now, that 4-bit PCD can be used by your digital system for further processing. Another important, rather a very important functional device is the multiplexer. What is multiplexer? Basically, it is like a data switch. It has multiple inputs and a single output. Now, by selecting any one input, the data that input is routed to the output. Let us talk about a 4-to-1 multiplexer. 4-to-1 multiplexer of course has 4 inputs and a single output. In addition to the 4 inputs and a single output, you have data select inputs. So, you would have 2 data select inputs. So, by writing 00 at the 2 data select inputs, you would be selecting the first input and the data available at that first input, it could be 0 or 1. It would be directly routed to the output. So, if you have selected the first input and the data there is 0, you will see 0 on the output. Again, if you have selected the first input, you will see the data 1 on the output. Similarly, you can select the last output by applying 11 at the data select inputs. When you select 11, the fourth input will be selected and the data select input will be selected and the data value 0 or 1 will be selected on the output. Let us have a look at the function table which represents the operation of a 4-to-1 multiplexer and the implementation of a 4-to-1 multiplexer. But before that, where will the multiplexers be used? Basically, your microprocessor we talked about the arithmetic logic unit of ALU. There are two inputs of the logic unit. What do you do on those two inputs? You apply two different values or quantities and then you select the ALU function and the ALU performs the operation. It will add, subtract and do the logical operation. Where will the two quantities come from? Basically, inside the microprocessor, you have different locations which are known as registers. Registers are like small memories. In registers, you have different quantities or variables. Let us say you have to gather the contents of variable A with the contents of variable B. What will you do? The register A which represents variable A and register B which represents variable B, you select both of them. You will connect the information of both of them on the ALU inputs. Similarly, if you need to apply the variable C with variable B, what will you do? The register C and the register B you connect them on the ALU inputs. Now, as you can see there are multiple inputs. You have let us say 10 registers from A, B, C to A. So, there are 10 registers. You can select one of them. So, 10 different inputs, one output. What is the output? It is input. So, you have two multiplexer units. Both of them should have 10 inputs and one output. So, by selecting the appropriate input from the appropriate registers you can route the data on the ALU outputs. So, this is the main application. There are other more interesting applications that we will see later. So, let us first look at the function table with the multiplexer and its implementation. Let us have a look at the 4 to 1 multiplexer. It has 4 inputs and 1 output. You can select any one of the inputs by applying the select inputs. So, there are two select inputs S0 and S1. So, when they are set to 00 the output is connected to the first input or I0. By applying the select inputs to 01 or setting the select inputs to 01, the input I1 is rooted to the output. Similarly, by selecting input values 10, the input 2 I2 is rooted or attached to the output. And lastly when the select inputs are set to 11, I3 input is connected to the output. So, any values at the appropriate inputs are available at the output. Now, looking at the implementation of the multiplexer circuit, you have 4 AND gates, the output is connected to the OR gate. Now, looking at the input 0, the first AND gate is selected when the select inputs are both 0s because they are connected through inverters. Now, the first gate is enabled when S0 and S1 are both 0s. Whatever the input at I0, it could be 0 or 1, it is passed through the AND gate and it is seen at the Z output. Other 3 gates are not selected. So, the output of the AND gates, the other 3 AND gates is 0. So, the output of the OR gate depends on the output of the first AND gate. Similarly, if S0 and S1 are both 1s, the last AND gate is selected, all the remaining 3 AND gates are deselected. So, their output is 0. Now, if I3 is 0, the output of the 4th gate is 0 and the output of Z or the output of the OR gate is also 0. If I3 is equal to 1, the output of the 4th AND gate is 1, the output at the OR gate Z is also a 1. So, basically by selecting the appropriate input, the appropriate data values at the respective inputs are passed to the output. We have looked at the function of a 4 input multiplexer. Commercially, there are different types of multiplexers available in different configurations. So, you have 8 to 1 multiplexer which has 8 inputs and any 1 input or any single input can be connected to the output. The function select pins will be 3 because you have to select 1 input from your art. Similarly, you have 16 input multiplexer which has 16 inputs, 1 output which functions select or rather input select pins will be 4. The multiplexer which we are just going to discuss now is a quad 4 input multiplexer. Basically, chip is 153. There are 2 4 input multiplexers in it. So, you can use them separately or you can connect them together to form different configurations. These 4 to 1 multiplexer which are quad multiplexers, their implementation at your gates which we have used. It is very similar to the circuit you just saw. Except for that you have 2 chip enable pins. So, you can individually select both the multiplexer together or separately. Let us have a look at the implementation of the quad 4 input multiplexers. Let us have a look at the quad 4 input multiplexer. That is, the first multiplexer has 4 inputs and a single output. The first multiplexer has the inputs 1C0, 1C1, 1C2, 1C3. The output is 1Y. The second 4 input multiplexer has the inputs 2C0, 2C1, 2C2 and 2C3. The output is 2Y. The implementation is similar to the 4 input multiplexer which we discussed previously. It uses each multiplexer uses 4 AND gates and an OR gate. The AND gates have 4 inputs. Basically, one input is from the input to the multiplexer. The other input is from the chip select. So, there are 2 chip selects 1G for the first multiplexer and 2G for the second multiplexer. Both these chip selects are active low. Therefore, you see 2 inverters at the respective chip selects. The other 2 inputs to each gate AND gate is from the input select A B. The input select A B are again active low. Basically, 2 NOT gates are connected together. Why do we have extra NOT gates? Basically, to reduce the fan out. If we do not have the extra NOT gate connected at the A input, how many gates does the external circuit see? Basically, an inverter and 4 other AND gates. So, the fan out would be reduced by 5, because the unit load is 5 for this particular circuit for the input A. Similarly, for input B, if the first or the extra inverter is not connected externally the fan out would be reduced to 5, because input B is connected to 5 gates, the NOT gate and 5 AND gates. Now, both these multiplexers can be operated independently. Let's suppose you need to use the first 4 input multiplexers. So, you would be connecting or using the first 4 inputs IC 0, IC 1, IC 2 and IC 3. You would be using the chip select 1G. The input select pins A and B are connected to both the multiplexers. So, if the second multiplexer is not used, the inputs A and B would not make any difference. We have looked at the implementation of a dual 4 input multiplexer. As I have said before, there are different configurations, which we will discuss in the next lecture. Take care of yourselves. In the next lecture, we will start the discussion again with the multiplexer. Thank you.