you compare with respect to this particular point in time, you will find that all these instructions are actually using the value after. For example, sub needs the value here, the and instruction needs the value here and the or instruction needs the value here. So it is quite possible to forward the value produced here to these instructions. You just need some extra hardware to be able to do that. And that is what is called a bypass path. For example, the output of the ALU here will get bypassed to the input of the ALU in the next cycle, so that the sub instruction can consume the value. So, this is what it looks like logically speaking that the ad instruction produces the value here and forwards it to the sub instruction in the next cycle. And it also forwards the value. So, remember that the value is getting carried forward to the pipeline registers until it reaches this point of stage. So, here in this register the value is still available, which it can forward to this instruction. So, that it can consume here, so the idea here is that you read a wrong value from the register file in the decode RF stage for example, but the bypassed value with overwrite. And we also discussed how the implement it will require a bunch of comparators, which will drive the selection of the multiplexes of the input of the ALUs. So, that you can decide what value to consume. So, the value in this particular latch will essentially get bypassed to the input of these two multiplexes. Or if you want to imagine it separately you can also have two separate multiplexes, which will actually select between the register file value and the forwarded value based on the comparison of the register file. Similarly, you can have an extra multiplexer here, which would select between this value and the value that is been forwarded from the output of the aid. And then you have this multiplexer as usual, which will select based on output whether to get the immediate or to get the next PC. So, that is the basic idea of bypassing and then of course, when you want to bypass from here, you do the same thing, only thing is that it will require longer wires. So, that will also come here, so that now select between this value and the value will forward from here. So, now as you can see your multiplex is getting bigger now. Previously we had to select between this value and the value will forward from this latch. Now, we have one more value to select from. So, essentially means that as your source points of bypass increases number of source points you will have bigger multiplexes. For example, if you look at this instruction, what if you see if you multiplex it will have a value forwarded from here, you also have a value forwarded from here. You cannot disable that bypass that is always on. Only thing is that and there is of course, another value coming from the register file. Out of these the values you will select the correct one based on register identifiers. What identifiers will compare here? So, this particular instruction will essentially this instruction will essentially take R 1 and R 7, these are the sources. It will compare against what we will compare against, it will compare against the destination of this instruction which does not match. So, in which case it will discard this bypass that is discarded, but you will find that this matches with this one. So, it will actually consume this particular bypass value. So, as you can see what it means is that as your span of bypass network increases, you will also require more and more comparisons to make. For example, here in this case both of these will be compared against both of these and of course, only one of them will pass. So, the question is the basic concept here. So, we also mentioned one thing that is about a phased register file and that helps you in resolving these all instructions bypass. So, here the point is that the value is written here in this particular cycle and the all instruction reads the value in exactly the same cycle from register file. If you do not take any extra care of course, the value that is read by this particular instruction will be wrong, it is guaranteed to be wrong, because the value that will that is written here in this particular cycle will appear in the next cycle about the output of the register. So, that is how the register is designed. So, what we are saying is that well if we can squeeze the register right in only half the cycle that is a positive the first half of the cycle and we read from the register file only in the negative the second half of the cycle. Then this problem goes away, because now R 1 will be written in the first half of this cycle and I will read R 1 in the second half of the cycle and I will get the right back. So, that makes sure that this all instruction does not require any bypass if you fail to get the right value from the register file itself. So, of course, the condition here is given your processor frequency, you can squeeze register right in half cycle and register read in half cycle, otherwise it is not possible, otherwise what will you do? Well you have to enable another bypass where this instruction will actually forward it to the execution stage on the right back stage. Just one small issue here that is whenever you say that. So, this is the end of the cycle. So, there is probably no latch here or no red pipeline register here. The question is when I say that well I really do not have this phase register file right of read. So, register right will actually take the full cycle. Then where do you actually bypass it from? How do you how do you accomplish this bypass? What is the meaning of this bypass? Where is coming from the value? There is no pipeline register here to bypass from. The register file will have the value that is right. So, you need a bypass from the register file itself right. So, that is the important point here that is you need a bypass path originating in the register itself which will forward the value to this particular rate and that is the important. But we would have to identify from which register are we going to. All registers will have. But there should be a selector which selects from which register to. Other registers are actually. No you know your question is very relevant. So, you have 32 registers here which value to source from right that is what you are asking essentially yes right. So, essentially we have to remember what value was just written in the previous cycle. So, essentially in effect you have to use a pipeline register which will hold the value for one more extra cycle which was written in the last cycle. So, in this case R1 will be held in a special register which was written in the last cycle and would be used to bypass to this particular stage. So, it is just one register which will always hold the register that is written to in the last cycle. And is that we also need the destination of the art and need the instruction for the art instruction to guide the comparators. The opcode. Yeah opcode and the destination register. Destination is needed but why do we need the opcode? No we do not need the opcode we need the destination. To guide the comparators. Yeah right. So, that is what I have said right. If you look at this particular instruction you will compare R1 R7 against R4 R1. No, but the R1 and so it is actually. Oh why do you get this from this? Yes right right. So, that is also in the latch right up to this point it is in the pipeline register. Because you need that to write to the register pipeline right. Beyond this point it is not there that is what you see. Yeah. So, that is all we have to remember the register ID. So, here you will require a special register which will hold the value at the register identifier. Yes. And which will be used here to activate the bypass. And what have we done? In effect we have increased one more bypass path to this multiplexer. Now, we have a bypass from here to here, here to here and here to here. And of course one path coming from the register pipeline itself right that is here. So, out of these four we will select one based on what? So, this instruction will compare R1 R9 against R6 R4 R1 right. And this one will match with this one. So, this one will actually go get over ready. This value will come directly from the register pipeline. Is it here? What if we had a longer pipeline here? We will require more bypass path. We will require a much bigger multiplexer right. So, remember this implication that if you make your pipeline deeper, there are two things that will happen. One, your branch penalty is going to increase that we already discussed. That is if you increase your pipeline depth on this side of the pipeline before the branch executes. And after the execution stage if you increase the pipeline depth, you will make your bypass network more and more complicated. It will require more and more space. It will require bigger multiplexers. It will probably slow down your process of the pipeline. And also we used this particular acronym to identify these hazards. These are called lead after right hazards. Why? Because you are reading after this register is returned. So, we look at other types of hazards. So, phase register file solves recycle apart raw. Otherwise, we require one more bypass path. And you always feed bypass values to the input. How many sources in the bypass network? So, in this case if you imagine that your register file is phase. So, we have just how many two sources right. One coming from execution, one coming from here. There are two sources of bypass. And till now we have only seen bypasses going to the execution stage only. The destination that we have seen so far. It is only requiring a bypass after the execution stage. So, the question that is asked here is doing it a bypass to the main stage also. Can you think of an example where there will be a bypass path dominating in the main stage. That is the main stage needs some value coming from somewhere else. So, what are the values that the main stage requires? What are the inputs to the main stage? There are two things that it requires. Sorry, a memory border needs two things. What are they? Address. Address and size. Yes, you are right. Size is also one thing and value. What kind of instructions require a value? Source. Exactly. So, the memory needs an address for sure. Somebody has mentioned that it needs a size also. However, the size is not very important here because it comes from the instruction of course. So, there is a dependency here. The size is not generated by somebody else. But address may get generated by another instruction. And of course, there is a value for score instructions. We may get generated which may get generated by another instruction. So, there are two things that we need for the memory border. Now, can you think about a dependence? So, there is a memory instruction which needs this address and value. Can you think of an example where one of these or maybe both of these getting generated by another instruction? So, here is an example for that. We have an add instruction here which adds R 2, R 3 and puts the result in R 1. Then, there is a load instruction which uses R 1 to compute the address and puts the value in R 4. And immediately after that it stores R 4 back to some other address. So, actually I am copying a value from one part of memory to another part of the board. So, let us see how the pipeline will work in this case. So, here is my add pipeline. So, remember that time goes in this direction. The load instruction requests R 1 getting generated by the add instruction. So, there is a bypass path that will be activated here. So, R 1 will be consumed from this instruction through this bypass path. And otherwise the load does not require anything else. So, it will compute fine. The store instruction has a double dependence. It needs R 1 from add to compute the address. And it needs the value from load to generate the store value. So, let us see how it works. So, the mem to x bypass for this instruction will get activated to pass the value of R 1. So, R 1 is needed here to compute the address. So, remember that the memory operations compute the address in the x stage. And the load instruction will bypass the value from here to here for the store. So, it is getting generated here. You can bypass it here. So, is an example where you need a mem to main bypass. Is there any other situation where a mem stage needs to have a bypass ran in the other case? So, here is a general question that you might think about. That will help you answer many of these questions. That is suppose I have a cycle. And you are focusing on a particular screen of pipeline, let us say S. And you are asking tell me what are the pipe stages that can bypass values to the stage S. So, what can you say about those stages that the bypassing value to stage S? Will they come before stages or after stages? For example, here if I look at the x pipeline stage, will I require or let us suppose let us look at mem pipeline stage. Will I ever require a bypass coming from the x stage? Can you see why? Because x always appears before mem. There is no way, there is no reason why I need to bypass actually. Because if you lay out the pipeline here, you will always find that x appears before mem. So, there is no way I need a bypass from x to mem. Because whatever currently x cannot, it has to be after the main instruction. Instruction that is currently mem, let us suppose this load instruction. Point is in the mem stage. Instruction that is currently x is actually after it. So, bypass always comes from previous instruction. Cannot come from the next instruction, that is not possible. So, whenever you are looking at a bypass, trying to resolve where are the possible sources of my bypass. It can only come from stages after. Cannot come from stages before, that is not possible. And of course, you can come from myself, that is possible. Here, mem to mem bypass, that is possible. So, in this case, since the only stage after mem is right back, there could be a possibility of having a bypass platform right back to mem. And we will come to that very soon, that particular possibility. So, anyway, so how many destinations in the bypass network? So, in this case, we have two x and mem. There are two destinations. So, how many, what is the number of multiplexers that you require? So, whatever number of destinations you have, whatever number of sources you have, there will be a cross product of that. And of course, you have to look at how many inputs are there. So, in this case, for example, you will require x to x. These bypass will require two multiplexers, because there are two inputs to the execution pipeline stage. And there is a mem to x also. So, there will be two multiplexers, each accepting two inputs from bypass and one from a registered pipeline. If I ignore the right back to x, bypass for now. And the mem stage, we will have just one bypass platform now. We will come back to right back to mem bypass very soon. And there will be one multiplexer, selecting between this bypass value and the value coming in from the execution stage. So, let us show you the diagram of the support. So, this is the store value, coming from the registered pipeline. So, you will be selecting the store value between this and the value that is getting bypassed from the output of the memory stage. Where is my value? Yeah, this value. This value will get bypassed. I am selecting between this and this. So, based on the comparison of the registered identifiers. So, in this case, I will be comparing R4 with the destination of this one. And there will be a match. So, I will say, oh, I have to take the bypass. So, yeah. So, as you make the pipeline deeper, you will need more and more bypassed parts. So, now the question is that, you know, till now, we have seen that in all the examples, even though we do not have the value of the registered pipeline, we can avoid all stocks by bypassing. There is no bubble here, any of these examples. We have bypassed the values exactly in time. No bubble here, no bubble here. Then the question is always possible. The answer is no. There will be stalls in certain situations. So, here is an example for that. So, this is a typical scenario where you require a bubble. An instruction here consumes a value that is loaded. So, whenever you find that a value that is getting produced by a state s and needed by the next instruction before stages, the next instruction requires a value at the x stage. That is not possible to find by bypass. That is impossible. Why is that? So, this is how it is described pictorially. So, this is where the value is produced. And this instruction needs a value here. That is impossible. That is a negative in time. So, how about this and instruction is ok, because it will require the x value, the value here that will get bypassed. So, in this case you really have no choice, but to stall the sub instruction for one cycle. You have to delay its execution by one cycle and that has to happen when the value can be bypassed. So, these are normally called the technical term is pipeline interlock. So, these are actually stall cycles. So, you need a hardware pipeline interlock to stall the sub by a cycle, the sub instruction. So, this brings us to the acronym MIPS. So, now I can explain what it stands for. It stands for microprocessor without interlock 5 stages. So, that is what MIPS stands for. And so, this is the only problem that MIPS had. So, question now is the name suggests that there is no interlock cycle. So, there has to be a reason, there has to be a way to avoid this stall. So, they rely on the compiler. So, they call this particular slot a load delay slot, which they rely on the compiler to be filled by an independent instruction. So, currently compiled MIPS code in the early generations of MIPS never had a dependent instruction on load in the load delay slot. So, that reads you of this particular bound. And which is why it is called microprocessor without interlock 5 stages. It had the compiler to fill the load delay slot with something independent or a node. So, which essentially means that the code that I am showing here is actually illegal MIPS code. So, of course, the load delay slot got removed later in the later generations of MIPS. But in the earlier generations, this was the case. So, this code will never be generated by MIPS compiler. So, for your second assignment, the compiler that is handed out is actually a little more advanced. It can generate this piece of code. So, you have to actually implement this particular interlock. Keep that in mind. Any question? Sir, in phase execution, how possible in this case? That is independent. Phase execution of the register file. Yeah, that is independent. No, I mean, there might be an exception of that. Because of the pregnancy of the MIPS. Could be possible, they did not do it. That is all. So, there must be frequency constraints. You can phase every stage if you want. That is possible. By phasing every stage, essentially what you are saying is that I am splitting the byte stage into two halves. But really, there is no latch in between. So, it is a multi-cycle byte stage. That is what it means. Any other question? So, a little bit more on bypass install logic. So, what does a bypass logic look like? How many forwarding paths? How large are the maxes? As you walk through your second assignment, these concepts will become even more clearer.  So, or if you can, without drawing, if you can forward in your head, that is even better. But anyway, the point is that as you do that, it will become very clear how many of these things you require. What about load interlocks? So, the question is, where should I detect this interlock? So, you can see, if you go back to this example. There are many places where I can detect that there is a problem. I can detect it as early as here, as soon as the instruction is decoded. I can detect it in this stage that the value is not available. Actually, there is a hazard, so I can install it here. But of course, these are the two possibilities only in this case. But if you have a deeper byte, there are many other options. However, detecting possible hazards early simplifies things. Because you are not too far into the pipeline, which means you do not have too many things behind you. So, you can install the pipeline early. And the fixed positions of RS, RT and RT, these are the register identifiers from your MIPS encoding, are important for register file access and hazard detection. Because this simplifies matters a lot. Because you know exactly what to compare, which positions of your instruction to compare against. So, in MIPS, all interlocks can be implemented in the decode state itself. So, that is very good, that makes it, that makes the design simply to distribute the interlock logic all over the pipeline. You can just implement everything in one particular pipe stage. So, what do you need? So, that makes sure that if you implement all your interlock logic in the decode state, what you have to do? You have to tell the fetcher to stop. That is one thing. The second thing is you have to putting no ops into the forward direction of the pipeline. So, you send all zeros to the execution stage. You have to keep on doing that until the interlock results. So, MIPS R3K does not have any harder interlock. As you have just mentioned, compiler fills the load in the slot. But in generations ahead of that, they actually have the load interlock implemented in the decode state. So, in this case, how do you implement the interlock? That is fairly simple actually. As soon as this is decoded, you know the source of this instruction. All you have to do is, you have to check the previous instruction, which is currently sitting where? Which is in which latch? Which is in this latch, currently sitting here, right? Currently executing here. So, all you have to do is, you have to take the content of this latch and check two things. Is the previous instruction a load instruction? And does the destination of the load match with one of my sources? That is it. If the answer to both is yes, that means I have to solve it. So, essentially what I have to do is, I have to tempt the fetcher to stall for one cycle. And I have to feed all zeros into this particular latch in this cycle. Next cycle onward, the proper action will be implemented. And this one we have already discussed, branch target in decode RF. You can actually bring the condition execution also in this stage, if you want to. That will only lengthen your cycle a little bit. But that will read you of all branch problems. But anyway, so I am not going to that. We have discussed in great detail branches and all. So, next thing is, we have till now, we have looked at this simple pipeline, right? Where execution takes a single cycle. But that is far from what the reality is. There are multi-cycle execution stages. And the very reason for that is to primarily support floating point operations. These are much complex to be finished to the cycle. For example, if you think about a floating point multiplication, it is almost impossible to finish in a single cycle. Also, multiple functional units may be needed to avoid structural hazards. So, if you cannot pipeline these multi-cycle functional units, you may require multiple of these to avoid structural hazards. Because now essentially, what you will do is, there is a delay of 10 cycles in a functional unit, which is not pipeline. The next operation cannot go in until this one finishes. So, for the following discussion, we will assume that, we have four functional units, which consists of one integer in ADU, which will do all the integer operations except multiplication and division. We have a floating point and integer multiplier. So, essentially what we will do is, we will carry out all our integer multiplications on the floating point multiplier, which we can do without any problem. We will have a floating point, add on and subtract. And we have a floating point and integer divided. So, all integer divisions will be added out of the floating point divided. Is it clear? The architecture. Now, our latency of an instruction is defined by the number of cycles needed to produce the result from the time it issues. The textbook defines it in a slightly different way, but we will follow this definition in the lectures. So, do not get confused. Assume that, integer ADU instructions have a latency of one cycle. So, these are simple operations. So, they can finish in a cycle. Loads have a latency of two cycles. Why is that? Because we have already seen that. In the execute state, it computes the address. In memory state, it executes a load. That is why these two cycles. So, from the time the instruction load issues to the time the value is produced, it takes two cycles. X state and middle state. Floating point add is four cycles. Floating point and integer multiplies seven cycles. And floating point and integer divide 25 cycles. So, that is the model of execution. So, maybe I will list it here so that we can remember. So, we can remember that, floating point add remember that subtractions also happen in the same unit. So, four cycles and floating point multiply also integer multiply same seven cycles. And floating point divided 25 cycles. Any question on this particular model of function unit? So, we will use it in the subsequent slides to demonstrate how multi-cycle X encryption stages make your life much more complicated. So, there is one more term to define that is repeat interval of an instruction. This is number of cycles between two instructions in the same category that can execute without a structural hazard. For example, number of cycles between two floating point additions that can execute is a repeat interval of the floating point adder. So, it depends on how the function units are pipelined. So, for example, if the adder is not pipelined, you will have to wait for four cycles before fitting the next instruction. So, let us assume that all the units other than the divider are pipelined except this one these are all pipelined. So, division has a repeat interval of 25 cycles while other instructions can issue back to back repeat interval of one cycle. So, which means there will be seven different there could be seven different multiple of multiplication operations in the pipeline or the multiplier. So, what does the pipeline look like? So, I have a fetch stage, I have a decode register file stage and then I have different pipe stages. So, I have an I a u x one cycle then I have a load pipeline which is just x and then I have a floating point adder which has four cycles. So, I will say a 1, a 2, a 3, a 4 and similarly I will have m 1, m 2, m 3, m 4, m 5, etcetera up to m 7 and divider will have d 1, d 2 up to d 25 and at end I have a right back search. So, all the instructions will produce values So, this looks very different from our previous architecture. Now, I have So, let me look at maybe I will put the green one also. Now, four different pipelines going on and even for the load instruction if I want I could put a separate ALU to compute the address maybe I should do that as an address stage and a memory stage. So, there are five different pipelines They all get diverged from the decoder. So, depending on the decoder outcome I decide which pipe to send the instruction to and finally they will write back So, clearly you require more pipeline latches or pipeline registers So, between these stages you require pipeline registers any other complications. So, that is all about the remaining slides. So, let us start with a simple one Structural hazards. So, divider is not pipeline that causes a big problem because if you have two division operations which are separated by less than 25 cycles you will have a problem. The second instruction has to be installed and then I can decide in the decoder itself. I want to implement all my internals in the decode stage. So, whenever I have a division instruction I check if currently there is anything in the divider. So, that state can be easily maintained here. So, that I can install the instruction. So, clearly that is going to introduce bubbles in my pipeline and we use So, a slightly smarter thing that I could have done here is that I can I can only stall the instructions. So, here essentially see there are two things you can do. One is that whenever you push a divider here you say that for 25 cycles I am not going to issue anything else. Because the register file will be written after 25 cycles. The other thing that you can do is you can say well I will continue issuing instructions only when I get the next division I will check and then stop. So, that is slightly better in fact much better than this because here essentially what you are trying to exploit is that the division operations are not that big. So, you will have a lot more instructions to put into these four pipelines while the divider operates. That of course makes your life much more complicated because now you have to be very careful while filling these instructions into these pipelines to make sure that they are independent of the running division operation. So, that is one problem about the divider. The second structure has an arises to register write ports. So, here is an example. So, let us take that example and see what happens actually. So, I have a multiplication instruction.  Then I have two more instructions which I do not care they fetch here. Then I have an add instruction.  Then I have couple more instructions and then I have a load instruction which has fetch decode x m and then you have a write back stage there. The problem is with these two instructions they try to access the register file in the same side. They want the write port in the same side. They may be writing to different registers, but they need to separate write ports to be able to write. So, that is another structural hazard that come up because of this different matrices of instructions. So, you have to be careful in schedule with the register write port you have to make sure that there is no clash in the write back stage. Because unless you have more ports you cannot really allow this to happen. So, again so you have a solution you either have more write ports or you have to introduce hardware interlocks which means stock size. So, where do you introduce this interlock this particular register write port interlock. So, what are the options you could detect right here that there is going to be a clash in the register write port when this instruction goes through because I know exactly the latency of this I know exactly the latency of this I can calculate actually the decoder sitting here that whether there is a connection for register write port or not. So, usually this is implemented in the shift register write port cellular. So, essentially what you do is you maintain a shift register. So, when you when this multiplication operation issues after the decoder you calculate how many cycles hence it will actually access a register file. So, these are essentially bits in my shift register they correspond to the cycles. So, 1 2 3 4 5 6 7 8. So, in this cycle M 1 will execute this cycle M 2 M 3 M 4 M 5 M 6 M 7 write back. So, I will mark a 1 here in the right to the register in the shift register. So, when this instruction goes. So, every cycle I decode a new instruction I shift this register on this side by 1 position. So, by the time I decode this instruction this bit has moved where. So, this instruction this bit moves here this instruction this bit moves here. So, when I decode this instruction. So, this bit is sitting here at this point. So, now I calculate from for this one this is a 1 a 2 a 3 a 4 write back. I move this bit 1 1 position when I decode this and I find out there is a clash in the same slot this instruction is going to access the register file and this instruction is also going to have. So, whenever there is a clash I introduce an interval. So, let us delay by 1 cycle choose of this interval. So, this bit will move on by 1 cycle and then when this guy goes it will actually follow it. So, there will be 2 ones. Subsequent instructions will check both the bits essentially what I am doing is I whenever I involve for a new instruction I prepare a mask with exactly 1 bit on I end it with this particular register. If the output of end is non-zero I know that there is a clash and I have to stall the current instruction. How many cycles I have to stall? So, I have to check the stalling by each cycle to see if the thing resolves until I get a 0 outcome on the end operation. So, that is one option I can detect in the decoder. The second option is I will let it go and detect it in the memory stage or the write back stage. So, essentially memory write back in this case is the last stage. So, essentially I will say well I will delay until I reach there and then I will detect which is fine also. The only problem is you have to introduce stalls you may have to introduce stalls to multiple different pipelines. Here I am showing only 2 instructions that there are a clash there will be more. For example, if I did not have this instruction here and if I had the load here this would also clash like for example, if this instruction was a loaded this would actually have a write back here. So, you may have to stall multiple pipelines if you delay until write back stall which one. So, I have these 2 instructions may be more which one should I stall everybody except the first one. So, the oldest instruction will be allowed to proceed others should be stopped. Is this step delivery? These 2 structural hazards one involving register write put and another involving write it. So, any non pipeline unit may have a hazard and your write course may have a hazard depending on how you resolve the schedule. You will have new raw hazards. So, here is one more example let us work to this. So, by looking at this you can see that let us see what are the dependencies. This add instruction consumes the result of the multiplication and it also consumes the result of the node. So, both of the sources depend on 2 previous instructions. So, this is my load fetch decode execute the traditional pipeline for load. Mult fetch decode does it have any dependency? No. So, this is a 1, 2, 3, 4, 5, 6, 7 write back add fetch decode 19 F 0 which is produced only here right. You have a long stall very long I cannot start a 1 until this cycle where you can actually have a bypass and 7 to a 1. However, the load instruction will be complete by then. So, there is no problem as such. So, you can have a you can have the value bypassed you know it is on in this particular cycle and then I have a store fetch this is stalled cannot do anything you can only decode here and you will continue like this. So, you have now more hazards that you take care of. Now, there is a new type of hazard which is right after right. So, you have an add instruction which produces dollar F 2 you have some instruction and then you have a load instruction which also produces dollar F 2. So, let us try to see what happens in the pipeline. I think I was keeping a mem stage all together here that cannot be stopped. Then I have the load fetch decode X web stage that should escape. So, there is a problem. So, you can see that there is a problem right. In this case both the instructions are right into the same register in the same cycle right. So, if you have already implemented the right port schedule the interlock we will have resolved this right. So, this instruction will essentially get delayed by one cycle or in the decoder and then we will move and write to the register file with no problem and I move the load instruction a cycle ahead. So, there is no right port schedule in flash right, but there is a problem what is that. Exactly. So, what is the final value of dollar F 2 that will survive. That is instruction right which is not correct. The dollar F 2 should have the value of the load instruction at the end of the sequence of instructions. So, this is called a right after right hazard. You have the same destination and the earlier instruction is writing later than the next instruction. So, of course this is a problem, but before that let us try to ask the question that is this realistic at all. Can this really happen that there are back to back to instructions they write to the same register. What is the meaning of this if you think about a program I do an addition operation write to very blanks right. In the very next instruction I say x equal to some value right. So, this can be equivalent to a C code which says x equal to let us say y plus z and then I say x equal to a 0. Why did I do this kind of operation actually I have never used that result right. So, the question really is that can this really happen and here is a code which is straight from you know Mips compiler. So, of course there could be many other situations where this can happen. For example, if you instead of doing an addition if you did a multiplication here you would have a much longer pipeline and even if you have put a few instructions in between before the load you will have the same problem. So, here what happens is that the compiler building the branch delay slot with an instruction with target F 0 all right. So, this instruction will always execute and then the branch jumps to the label where you actually load a new value into this case. This is the part where we legitimate code there is no problem with this and this will lead to the same problem involved result all right. So, the question is that how do we really handle this. So, again we will take the same procedure that is we will introduce interlock delay issue of the later instruction or prevent the earlier one from writing there are two things we can do one is that we can figure out that this load instructions right is not going to be of any use. So, I am sorry this add instructions right is not going to be of any use. So, we can nullify that right back completely and the second option is that we can delay the delay this particular instruction by how many cycles is needed to make sure that the hazard goes away and again we can do this in the decor stage. So, again in the help of the register circuit we need to save it may be slightly different one we should essentially look for not only just clash in the right port, but we also check that with the register destinations are also important and in that case it will introduce delay. So, what is the hardware you can do this with the shift register. So, for hazard detection we need to look for integer as well as floating point address that is the essentially that is what we have just seen here just focusing on the integer side is not enough. Internal floating point instructions use separate register files right. So, there are two separate register files for these two. So, you might wonder you know could there be a bypass coming from an integer instruction going to a floating point instruction and that will be possible and that is yes even though the opponent on two different register files. So, we will look at examples very soon floating point load store uses integer registers as base. So, this is one example where a floating point instruction may require a value to be bypassed for integer instruction like for example, here if dollar 2 was getting computed in the integer pipeline you would have a byte you might require a bypass from that instruction to this floating point load even though this load is actually a floating point load. So, there could be hazard between integer and floating point instructions also there are move instructions MTC 1 and MFC 1 we have discussed this earlier we are discussing the MIPS ISA that move to or from floating point register file to integer register file. So, why needed we have also discussed this does anybody remember why do I need to move a value from floating point register file to integer register file or vice versa that connection exactly. So, if you want to cast a floating point value to an integer value you would make a move from floating point register file to integer register file and the other way required to move in the other direction. So, in these last two cases we need to detect hazards between integer and floating point instruction as well because MTC 1 that is move to floating point file essentially we will have a floating point register destination and an integer register source and that source may get produced by an integer instruction. So, there will be hazard coming from integer instruction to this one similarly MFC 1 will have a target integer register and a source floating point register. So, that may have a that may actually start a bypass to an integer destination because the destination is integer file integer register here otherwise hazards can happen between integer instructions only or floating point instructions only simplification made possible due to separate register files. So, any problems of having separate register file. So, this is a good thing that simplifies your bypass network right. So, if you did not have you would have actually a lot more cases of bypassing if you would share the register file ok. So, that is one reason why you would not unify register file and other problem is that you probably require a bigger register file which may actually slow down your problem that makes sense to divide term simplification.


Hi, my name is Charlene Chan, I study in the School of Nursing.大家好,我是優表情,我現在是眼波視光學系的學生。大家好,我是程麗晨,現在在石莊旅訪之學院主修石上林授瑜市場學。Hello, my name is Charlene Chan, I study in the School of Optometry.Hello, my name is Emily, I am now a Year 5 student of the School of Optometry.Hello,大家好,我叫Pau Yee,我現在是學學的中文及學系的學生,我讀的語言科的文學史。E-language is a platform that allows students from PolyU to get more immersed in language learning through an E-platform.They are exercised and reading in various categories, covering different needs of students.無論你是想拿到一個更好的成績,學習更加得實用的職場語言技巧,還是純粹想去學一個好的語言。而語學都可以幫你提升你的閱讀、聆聽和說話技巧。於是,外同生們提供了模擬評估練習,範圍涵蓋日常生活,學習工作等話題。有助於訓練我們的語言技巧,使大家具備學術研究和求職所需的中英文寫作,閱讀和口語溝通能力。It is a convenient tool to learn English in different aspects.The course is typically good for training our skills in professional communication,which equips us with reading, writing and oral techniques necessary for academic tasks and job applications.我們亦都可以從多方面去學習語文,例如我們可以學習到一些日常生活的用語,以及一些學術和職場的語言。平台所提供的三字褲都是根據不同的情景和主題為大家度生病做,可以令大家在用詞上更加豐富。E-language is good for students who like to improve their language proficiency,but do not have time to sign up for a regular offline course.In E-language, you can take your course at your own pace.You would find the information useful for your whole life, especially for your career,no matter to get a job or to secure your position in your job.You will be able to improve your academic performance and become more competitive in the job market.One tip I have for learning languages is to immerse yourself in the language that you are not that familiar withand give yourself courage to make use of that language in your daily life.其實學習語言有很多種不同的方法,但如果你可以找出自己適合的學習方式,就可以令到自己的學習是普通的。除了參加異語學,同學們還可以通過語來自世界各地的同學交流學習來增進自己的語言水平。讓我們一起來報名參加異語學掌握更多有效學習中英文的技巧吧!


This systematic review found that antibiotics reduced the diversity of the infant kept microbiome in low and middle-income countries will mix, while also increasing the presence of antibiotic-resistant genes. This suggests that antibiotic use may be contributing to the development of antibiotic resistance in these regions. Further research is needed to determine if this reduction in microbiome diversity and increase in antibiotic-resistant genes puts LMIC children at greater risk for adverse health outcomes, such as infections with antibiotic-resistant bacteria. This article was authored by Charlie C. Lukhen, Muelva Chibiwi, Rene Spijker, and others.


Hey everyone, this is Dan with another episode of my crash protection videos. Since the beginning of the year, S&P 500 is down 16%, NASDAQ 100 is down 25%. Last Thursday, May 12th, the market hit an interim bottom with S&P being down almost 20% from the beginning of the year. Since then the market has rebounded a little bit, will the stock market continue to recover? Where should we invest our money if the market continues to go down in the next few weeks? I have found several ways to swim against the current, in other words to make profits in spite of the sinking market. Let's get into the details. First, let's see how SPY and QQQ are trending. As you might know, SPY represents the movement of S&P 500 and QQQ represents the movement of NASDAQ 100, as you can see in the chart. Since the beginning of the year, SPY is down 16% and QQQ is down more than 25%. Definitely this is a very bearish picture. In the last few days, SPY has gotten below a very important support level, same with QQQ. The good news is that since the market hit the bottom here, last Thursday, it has recovered a little bit. The big question mark is whether the market will continue to recover and if the market does not recover and starts to come down again, where should we invest our money, that way we can still make profits in spite of the dropping market. Actually, there are several ways I found to make profits in the sinking market. We will talk about that in the next few minutes. In the last few years, we have been conditioned into thinking that the fang stocks are the best performing stocks in the market. Let's see how they have been doing since the beginning of this year. As you can see from this chart, they are actually doing pretty badly. For example, in this chart, again SPY is a candlestick chart, which is actually the best performing instrument in this chart. And below that is Apple, that also went down by about 16%. Alphabet or Google went down by about 20%, same with Microsoft. QQQ down 25%. Amazon down almost 35%. Facebook down 40%. Netflix has been down a whopping 68%. Definitely, our conventional thinking does not work anymore and if you still have a lot of your money in the fang stocks, you are not a happy person at this point. I still actually own some Google shares, but I sold most of my fang stocks shares as well as some of the semiconductor shares so that I could free up money to purchase all the assets that actually helped me make a profit in the last few months. And I'll talk about that in the next few minutes, which is related to this chart. If you look at this chart is the almost flipped mirror image of the other one. The previous chart had the lines all below the SPY line and this chart pretty much has the lines above the SPY line. As you can see, SPY is here on the bottom, losing 16% since the beginning of the year and a little bit below that QQQ losing 25%. And then we have this line, which represents the ETF UNG, that's a natural gas ETF up 109% since the beginning of the year. Isn't that wonderful? If you have bought UNG in the beginning of January, then you will have double your investment by now. And then next to that, you see all of the oil ETF up 101% TMV and ETF related to the 20 year Treasury rate up 71%. Now, these two are not spectacular at this point, but they have the potential of doing it up quickly. And I'll explain that later. COPX, the copper minor ETF, it's actually down a little bit by about 2%, same with CPER copper ETF down 2% so far since the beginning of the year, but they will be shooting up quickly based on my estimate. I'll explain that in the next few minutes. If you like what you've seen so far, I'd like to encourage you to click the like, subscribe and notification button that will enable you to receive notification when I post my next video. And it will encourage me to make more videos like this in the future. Thank you very much. Let's continue. We have a lot of interesting things to cover. Let's talk about a few major events that happened in the last few days. On May 4th, the Federal Reserve banks raised interest rate by half a percentage point. And that's the biggest rate hike in two decades. The Fed is doing that because they want to fight inflation. In addition, they want to reduce the total asset by up to $95 billion a month, starting a few months from now. And I'll talk more about that later. What the Fed is doing is basically tightening the money supply. And that will definitely have an adverse impact to the stock market. Basically, the Fed wants to cool down the economy. They want to cool down the stock market. If you look at the CPI inflation rate is being shooting up quickly since January of 2021. And as of March, the CPI was at 8.5%. April, it's actually a little bit lower, but still pretty high at 8.3%. And then we'll learn about the May CPI on June 10th. Hopefully, the May CPI is not as high as 8.3 or 8.5. If May CPI is much higher than 8.3 or 8.5, then the Fed will probably even tighten more. That'll bring more pain to the stock market. Why are the Fed actions so important? This chart tells it all. This is the total asset held by the Federal Reserve banks. And every time when the Fed increases assets, it's actually creating money or liquidity in the market. Starting from the pandemic beginning of 2020, the Fed total asset increased from about $4 trillion to $9 trillion now, a little bit more than double. And coincidentally, the S&P 500 also about double during this time. Of course, there's more money chasing the same amount of stocks. And that's why when the money supply double, the value of the stocks in the market also about double. Now, what's going to happen is that instead of increasing the asset every month like here to the tune of $120 billion a month, it has flattened out up until this point. And pretty soon it's going to start coming down at the rate of up to $95 billion a month within the next few months. And that's going to have a profound impact to the stock market. In the meanwhile, because of the Omicron COVID variant, Shanghai has been locked down in the last few weeks, as well as a few other major cities in China. And that has slowed down the supply chain and caused the prices of any manufacturing products to increase. The good news is that the deputy mayor of Shanghai has been saying that they will gradually start to relax the lockdown procedures in Shanghai. And they hope to be able to open everything between June 1 to mid and late June. Let's hope that happens to Shanghai and the other major cities in China that have been locked down. Oh, there's an article that came out today. It says the Fed has a new plan to avoid recession. In other words, the chairman of the Federal Reserve Bank, Mr. Jerome Powell, wants to aim for a, quote, soft landing, unquote. And he referred to the soft landing in 1994 when Alan Greenspan was a Fed chair. Apparently at that time, the Fed was able to control inflation by cooling down the market and without bringing a market crash. Jerome Powell is very hopeful that he could do the same thing. Let's hope for the best. But if we end up with a much harsher landing than a soft landing, I believe I have the strategy to avoid losing a lot of money in my portfolio. I'll be talking about that in the next few minutes. How do we swim against the current? In other words, how do we make profits in spite of the fact that the stock market might be sinking? There's one instrument called the TMV, which is the ETF pack to the 20 year treasury rate. And that has been going up nicely, as you have seen in the chart that I've shown. And also the other two lines in the chart are UCO and USO. They are crude oil ETFs, but they are related to the Ukraine war. The reason why the oil prices have been so high is because the fear of the oil supply by Russia being reduced or cut off because of boycott from the United States and from the European nations. Actually at this point, the Russian oil daily production volume has not been substantially reduced yet. But the price increase in oil is primarily due to the fear of a future shortage. And actually the EU has been talking about implementing a plan to progressively decrease the reliance on Russian oil during the course of the next six months to a year. When that starts getting implemented, I believe the oil prices as well as the prices for ETFs such as UCO and USO will continue to go up. And that's why I've been buying UCO myself. UNG, similar to the situation with oil, Russia provided a lot of natural gas to Western Europe and that's why the price for natural gas has been going up as well and because of it the UNG ETF has been going up. Weed, because Ukraine is a major wheat producing nation, they supply wheat to the rest of the European nations and that's why the wheat price has been going up. Now again, as soon as there's a peace of settlement in Ukraine, these instruments will go down quickly and that's why we need to be agile when we invest in these ETFs. And then I also have been swing trading SQQQ or SPXS. They are the three times inverse ETFs, pegged to the NASDAQ 100 or S&P 500. And then in anticipation of the reopening of Shanghai and other major cities in China, I believe CPER and COPX, the ETFs related to copper will be going up. And just today I bought some COPX shares. When would market recover? There are several things that could lead to a significant recovery of the market. First of all, if we see positive Q1 earnings and bullish Q2 projections actually pretty much all the major earnings have been announced and the projections have been very cautious. That's why this first pull-up point actually hasn't done much for the market. Now we can hope for the second pull-up point, which will be the end of the Russian-Ukraine war. And of course, if the Ukraine war comes to an end, that will help restore stability in the stock market to some extent. But in the meanwhile, it will bring down the prices of ETFs that we just talked about, the oil-related ETFs, natural gas-related ETFs, and wheat and grain-related ETFs. So we've got to be careful in that regard. And if the COVID lockdown is ended in China, which hopefully will happen by the end of June, and if inflation can drop to 3% to 4% range causing the Fed to stop raising interest rate, and of course when the Fed stops reducing its assets, that will help stabilize the market. Now the last pull-up point is an unhappy way to bring about the recovery of the stock market. That is when the unemployment rate gets to be so high, for example, higher than 6%, which will cause the Fed to ease its monetary policies, including increasing Fed assets, and also reducing interest rate. But that will come about because of pain that already happened in the economy. Let's hope we don't see that happening anytime soon. Let's hope the pull-up points above this line come to fruition and help restore stability in the stock market. What are my strategies? I've been selling shares of stocks such as the FANG stock and semiconductor stocks when the prices fall below certain critical support levels that I've been sharing some of my trades with my Twitter subscribers on a daily basis, and I've been buying stocks and ETFs that tend to go up with interest rates. For example, I've been buying and selling TMV and have made Silicon Profits with it, and I've been buying stocks and ETFs that tend to go up with energy and wheat prices, including UCO, UNG, XLE, which is the energy-related ETF, COP, conical Phillips, wheat. I have not bought wheat yet, but I will soon be buying that when RSI value gets to a reasonable range. And I've been keeping stocks with strong fundamentals even though I've sold some shares to raise cash for the other instruments that I bought recently, but I'm still keeping shares of applied materials, ASML, advanced micro-devices, brochure Hathaway B, Alphabet, O'Reilly, Automotive, Qualcomm, Taiwan Semiconductors, and I've been swing trading recovery stocks or stocks with long-term potential such as LUV, Southwest Airlines, Royal Caribbean, Tesla, this is the Copper Minors ETF and Copper ETF, and I've been swing trading triple ETF such as TQQQ and SQQQ. At this point I'd like to suggest for you to also subscribe to my Twitter account. I've been sharing some of my trades and also major news developments with my Twitter subscribers almost on a daily basis. For example, on April 29th I tweeted that I sold SQQQ shares I bought the day prior and realized 8.3% gain. That's pretty amazing, 8.3% gain just in one day. And then on May 12th I tweeted that I sold half of my UNG shares at about 8% gain and that's one of the ETFs that I show on the chart earlier that actually went up when the market went down. That's the natural gas ETF. And then just today I bought more UNG shares because it's rebounding from the middle of the Bollinger Band 20-day simple moving average line. And then also today I bought the COPX, the Copper ETF because the COVID lockdown in Shanghai and in other cities in China will end soon. Again if you like what you've seen I'd like to suggest that you click the like, subscribe and notification button and do subscribe to my Twitter account. You can text me your questions on a daily basis and I've been doing my best to answer my subscribers and actually we have been having some very interesting discussions. As usual I will very much welcome your comments, questions and suggestions. I'd like to remind you that I'm not a financial advisor. I share my stock trading strategies and analyses for educational and entertainment purposes only. If you want to buy or sell stocks you should make your own decisions and you should definitely check with your financial advisors before you do so. This wraps up my video for now. I will chat with you again in the next few days. In the meanwhile I'd like to wish you the very best of luck with your financial investments.


Hello. My name is Dr. Jeff Smith and I started Great Lakes Surgical Associates 21 years ago. We now have four surgeons with over 50 years of experience. We provide a wide range of surgical services, including weight loss surgery and the full gamut of surgery. We are completely committed to the highest quality of care. In fact, we promise that your care will be second to none. Our philosophy is that we really want to treat every patient as if we are treating our child, our spouse or one of our parents. We certainly understand the anxiety and stress of having a serious medical condition and we are committed to healing you both physically and emotionally. Thank you.


Hello youtubers. I hope so. It's going to get well. This is my first video. I'm going to show you how to remove the keyboard. I mean how to remove the rivets of the keyboard with my tool. Everyone knows how to do these things with a supplier with a cutter with other tools but I think this is the I think this is the best choice you can have it so far as it will make your life a lot easier and in the time you spend fighting and you know sweating and you know try to take all those rivets you break the head you couldn't put the screws in there so basically this tool is like one of the best invention for this kind of job so I'm going to walk you through the processing to do it as I did have some few requests and to show how the tool works. Bear in mind I just filmed me with my iPhone and a very really really precarious light so it's not the best however I try to show you what to do. Okay so far few more screws to take it off. The end of this one is taking the keyboard, remove the rivets and once you remove the rivet you will have space to replace.  I do like to have all my screws help at a little magnet so let's chance to get lost okay okay two and three to go. Now it's a tricky part removing the keys some people they found the easiest way some people they pull it some people they push it and basically I opened the machine I hung the screen so if I if I make any pressure on on this on the keyboard it won't damage the screen so the last thing we have we need is to get something else damaged apart from the keyboard so just pull this one on the MacBook Air coming much easier than the Mac Pro however still make sure you disconnect the keyboard before pulling like I said you don't want to damage something else you're fixing something and then you break in something else so take all the precautions before opening it before doing everything else okay keyboard is off it's going to be now is the part where everyone asked me to see this stuff okay this is the tool basically what it does grab the the the rivet try to focus a little bit more what it does grab the rivet and you pull it off it's a little bit too cushiony this one it's a firm surface we have another one here okay very easy put the tool move a little bit and coming off that's it okay now I'm going to do like a little bit fast because I need to finish this job soon two three okay I'm almost done all that we have through now here we are all done less than 10 minutes start to finish I mean it since since since I start to take in the the actual keyboard the actual taking the the rivet take less than two to three minutes when you get used to I'm not talking to the camera you can do in two minutes very quick very easy and not even a single really got stuck in here all are all are gone completely no one single broken so we have 100% success I say 98% just engage just to be on the safe side but I I reckon it's 100% okay and if you call any inquires I'm happy to answer and also you can buy this tool from me remember I'm the inventor of this tool so no one else will have it thank you


Now it's time to conclude this course. What we saw in this workshop is first an introduction to Graphics Concept and an overview of the display architectures, an overview also of the STM32 ecosystem, with the Qubemix and the Qubemware, and the Graphics tools that have been added recently, and one of the Graphic Library solutions supported by STA called STMWin. Now you can start to select the right STM32 for your use case according to system criteria and the STM32 capabilities. Select a display based on your graphical user interface requirements and the selected STM32, and you can also start to explore the STMWin with a reference example and your functional environment that you created during the hands-on session. To go further, you can contact your regional FAE or go directly to the online support at myst.com. Note that the presentation slides are available for each lecturer as PDF version directly in the course webpage. The hands-on materials are also available as external resources, and all the documentation mentioned during the presentation are available as external resources directly in the MOOC webpage. Thank you for your attention and see you maybe in the next course.


Welcome back to Kids Fun Science. My name is Ken, and today's experiment is the Ivory Soap Experiment. As always, adult supervision is required. What you need for this experiment is Ivory Soap, a Microwave, and some Oven Gloves. So I started off with dial soap here on the left and Ivory Soap on the right, and we're going to have a little quiz here for you. We're going to say, what happens when you put each of these soap in the water? Will they sink or float? So you make a prediction, and we'll see what happens. So I'm going to start off with the Ivory Soap first. I'm going to put it in and it floats. So it floats, and then we put the dial soap in and it sinks. The reason the Ivory Bar of soap floated is it's whipped with lots of air in its production, so it floats in the water. The Ivory first slogan was, it floats. It was introduced in 1891. The other brands of soap there whipped up with that much of air, so therefore they sink. So we started off here with the Ivory Bar of soap. I didn't do the whole thing. I cut about an inch off the end of it, and then I cut that in half. Then I'm going to put it in the microwave for about one minute. So on the way out, you're going to need to use Oven Gloves. Here you go, put it in. I'm only going to go with one piece there. I'm going to put it in, and I'm going to set the microwave for one minute. So here it is. It's starting to go and the plate's spinning. So it's a little bit hard to see, but we'll be able to see the end results. The Ivory soap itself is when it's heated in the microwave, it gets hot and it causes soap to get soft. The microwave beams on the oven excite the water and the air molecules that are inside the soap that causes it to move in the opposite directions from each other, and they vaporize. The vaporization of these molecules causes the tiny air pockets and bubbles trapped inside the soap to rapidly expand. Since the soap has been heated and it's in a soft state, the expanding air and water molecules can easily push out into a new foam-like substance. Although the soap looks vastly different than when we started, the substance of it remains the same. There is no chemical reaction during this experiment, only a physical one. So when you take it out of the microwave, the plate is very, very hot, so make sure you use your Oven Gloves. Now, it's going to cool down pretty quick, but you can just feel it by touching it very quickly and you'll know when it's time to pick it up. When it is cool and you do pick it up, it's this nice little flaky feeling. It's a nice texture and it's the same exact soap that you had in the beginning. What did happen in this demonstration is Charles Law, the volume of gas that increases with temperature. It's got a really cool feel to it. It's flaky. You can make it in two different shapes. You can still wash your hands. And remember, after this experiment, remember to wash your hands so you don't have any substance of soap just sitting on there and that could irritate your eyes or anything like that. I hope you enjoyed this video. Remember to click thumbs up and to subscribe. Thanks for watching.


Ewanon Bilbo, more than two trillion dollars is the cost of poor quality code just only considering USA and four days is the time spent on fixing bugs. Who here doesn't think that clean code is a crucial thing to use?  So okay, I will try to convince you that clean code is one crucial thing. So let's try with clean code. I'm Jonathan Villa, developer advocate for Sonar, Java champion, as he said, with the long story with the Java community, but we're a developer for more than 30 years with languages like Delphi. Has anybody used Delphi before? So if we focus on clean code and the cost, it's more than two trillion, only on poor quality code, but more than 1.5 trillion, only on technical depth. And we are not counting even the reputation cost. But if we fix only on finding and fixing bugs, it's more than 600 billion dollars. So now at this point, we know that the healthier the clean the code is, the less number of defects, therefore the cheapest it will be. But what is clean code? Well, basically clean code follows four main attributes. It has to be consistent having the same format and the same solutions across all the code, but also has to be intentional. It's clear what a function method class is doing with the logical approach and efficient because it's not wasting more resources than needed. But also it's adaptable because it needs to evolve easily. Therefore, it will have a clear and focused goal. Also, there are no repetitions and it will follow a modular design in order to allow it to evolve independently. Finally, it is well tested and tested well. It's not the same. Google it. I'm also responsible because it will not infringe licenses or copyrights. It will not have hard coded private information. Yes, there is a lot of hard coded secrets in the code. Check it. And it will also don't use offensive language. This will lead us to have a maintainable, reliable and secure code. But how can we do clean code? Well, the developer will use their usual ID and using a plugin, in this case SonarLint, it will check the code as they type. This way, the developer will see how this is an issue, so they will learn why that is an issue and also the way to fix those issues. Doing this, they will follow the methodology of learn as you code. It's not only fixing things, it's learning and being a better developer. But also, they will focus only on new code. Eventually code will die. So every year, 20% of the code is changed. So why to focus on old code? There's no point in that. So focus on new code have good code being merged into main and you will be fine. But then once everything is done, we need to avoid that bad code is merged to our main branch. Therefore, we need tools like SonarQ, for instance, that has quality gates. So we configure which is the level of or number of vulnerabilities, issues and test coverage that we want as a minimum to be merged into the main branch. With this, we will have clean code in production. But also I want to tell you which is the clean code involvement in open source. Well, just only considering what the Sonar Cloud free edition is analyzing, more than 87,000 open source projects. Well, there are Apache Software Foundation, Eclipse Foundation with several projects that are following this approach and using these kind of tools. Projects like Apache Camel, Hazelcast, even the Java SDK for Amazon are following this approach. And as a contributor, well, Sonar has been present on the open source world for more than 13 years with SonarLin and SonarQ. And I want to finish just simply showing that there are several tools free to use that you can incorporate in your development line, IDE plugins that will check your code as you type, as SonarLin free, SonarQ also free and open source that will analyze groups of projects. And finally, SonarCloud with this free edition for open source projects. If you want to know more, just go to the website or ping me.


Welcome to this video session. In this video session, we're gonna look at Python implementation of fractional knapsack problem. Let us see what outcomes have been planned for this session. For this session, at the end of this session, the students who are watching this are expected that they will be able to provide Python implementation for fractional knapsack problem. So before we move to Python coding, we will be using PyCharm ID and it is the expectation that the audience who are watching this video have some fundamental knowledge of Python language and they have a latest stable PyCharm ID. Community edition is enough for our needs. Yeah, before we go for any hands-on on implementing algorithms in Python, it's very crucial to know the time complexity of containers and collections in Python because when we implement a pseudocode algorithms, what we do is we write a pseudocode for algorithms and we calculate the time complexity of algorithms based on the pseudocode which we write or in general, the algorithmic representation. But often when we implement those algorithms in languages, for example, we are using Python, but in some cases it could be C, Java, or even other than a language. So it's most developers, what they do is they just assume or rather than saying that they will just presume that a specific operation in Python, for example, maybe it's a sorting or maybe for searching or maybe finding a min element in a list or a specific container in a Python, they assume that it's of specific complexity. And most often this always results into a bad program implementation. So it's very important that we understand what are those operations and what is the time complexity of those operations implemented in Python's C Python runtime. So we will go through the standard the time complexity manual of Python, wherein it lists you the time complexity of various crude operations on containers and collections from the Python's standard library and then the collection module as well. Apart from that, we'll also look into a module in a Python called as HIPQ module, which lets me build min HIPs and also which also lets me have a priority queue implementation Python. So we'll also touch that aspect as well and we'll see what exactly will be the complexity of any HIP or a priority queue constructed using those models in the Python. So let me switch to these Python's time complexity manual. Okay, so now we are on a page where it's the standard Python docs module where the Python implementation, it's a Python's standard module here, where you can see here that these complexities are based on the current implementation of C Python. And this is for Python 3 we are looking at. So now when you look at this, what I was talking about as a more important aspect which you need to concentrate when you give a Python implement to the algorithm is these complexities. For example, if you take a list and to the list, if you add an element append at the end of that list, then the complexity of that operation is O of one. So under the average case. So this matters so much for a theoretical consideration but when you're writing an algorithm for a practical consideration, it's very important to also understand the amortized worst case complexity but as of now we will slightly skip this. We will more talk about these complexities. So the append is O of one. And you can see that sometimes when I insert this append at the beginning, then suddenly the complexity is very high. So you can see here, pop last. It means that removing last element from the list is O of one, but popping any of the middle element in the list, popping any of the middle element in the list, it's complexity is O of N. So you can see that in our algorithm implementation, if we do this operation, then we have to consider that operation as O of N, not as O of one. That's most misconception with developers or the novice beginners who begin with language. They keep into mind that, okay, their algorithm and the program has equal complexity. No, it depends upon how well you correlate the pythons or any language internal implementations with your algorithms derived complexity. So since our implementation, Python implementation of algorithm, which we're gonna see the hands-on, it depends on Python. It's very important that we look at this chart. So this is for the list. And you can see here, if you want a double ended queue, then this is the best data structure which lets you append left, append right, which lets you insert and deletion at the both the end of the container and that's O of one, that's a D queue. So this is what is recommended. And one more operation which very frequently we use is sort operation and searching in a list. So when you search in a list, for example, X in a S, then it's also O of N. Finding minimum and maximum of a list is also N, but you can see that surprisingly, getting the length of list is O of one, quite contrary to the major developer perception that finding the length of a list will be an operation. It's a beauty of Python, which does give you the length of list in O of one. So this is set. So you can see that whenever you take a set, symmetry difference or when you say whether the element is present in set or not, it's O of one. So most often we need such operations in algorithm implementation. And these are the dictionaries. As you can see that average case dictionaries is always O of one. Whenever you look get item, set item, and delete item, it's important that we much worry about this. But you can see that amortize worst case complexity is O of N. Okay, so fine. We'll not give much attention to this, but we'll only rely on this assumption. So iterating dictionary is N and copying the dictionary is O of N. Don't think that creating just a copy of dictionary is one operation that no. Whenever if you create any copy of a dictionary, then it is O of N. So by looking at this, I think one of the, another very important thing is sort, which we very frequently we use in our algorithm. As you can see, for sorting, the complexity is O of N log N. And it's somewhat based on team sort implementation. Very important, note that the sort, built-in sort, whether it is sort or sorted, it's always N log N in Python. So this is for the time-close of basic operations. As we have said, we are using another module. We will be using another module heap queue. We may use it. Most algorithms do require you employing priority queue and heaps. So this is a module, and this gives you a mean heap representation and it's based on the textbook heap algorithms. So the API differs on textbook. So it gives you zero index, mean heap based textbooks implementation. And so you can see that this is almost like heap dot sort. So it's a kind of heap, arabic heap implementation given to you. The general complexity of this is N log N. All the standard heap related operations, what the retrieval insertion of log N and maintaining heap is N log N. So this is also very beneficial when you want to implement a heap in our goal, specifically when you talk about optimal file merge pattern or some other kind of algorithm which requires to maintain a heap or tree base structure. So this is a program to solve fractional knapsack problem. As you know that a general fractional knapsack problem tries to minimize or sorry, it tries to maximize the maximum profit for a given sack capacity. So in order to solve that, we have to sort the items in the ratio of profit to weight. So this is how we do it. And I have just taken a custom function to define sorting logic, but later I have replaced it with the lambda one. So you can either use a lambda or you can directly give the sorting logic here. That's anything works. But I have preferred here to write a lambda. So the let M denote the maximum sack capacity and let the total price be zero. That's what the total price we have to calculate at the end. So the list of items is represented in this way. For example, this is one item and here it is p comma w. It means it's a profit of item one and weight of item one, profit of item two, weight of item two, so on this goes. So I'm representing in form of p comma w. So now as you all know that if you want to solve it, solve the fractional approach and if I want to maximize the profit, I always tend to take an object which has the highest amount of profit to weight ratio. So in Python, what I do is I use a sorted method. I want to sort this. Yes, I'm sorting it. And now since the sorting order is slightly different from the natural ordering of this list elements, what I do is I provide a key to it and I make sure the key is nothing but item of zero by item of one, which means the profit by weight. So appropriately you can sort it based on the ratio of profit to weight. And I want this in descending order. So I give reverse key is equal to two. This makes sure that this item is sorted. In descending order of profit to weight ratio. And once I done with that step, only thing you are left with is you need to take each item from the sorted item and make sure you calculate the M. You recalculate the, keep on re-changing the SAC capacity so that you will entirely, either you end up exploring all the sorted items or maybe you will end up exceeding the SAC capacity. So either of that conditions you will be coming out of this and then you can print the total price, which is possible, which is maximum possible total price under the given conditions of M is equal to SAC 15 and given item list. So now if you work for this problem, let me execute this. So if you execute this, you get 26 and 26 is the right answer. So later on you can pause the video and you can work on this and you can verify if it's the right answer. So this is implementation of fractional NAPSAC program and you can try to guess what exactly is the algorithm design paradigm being using that. And once again, I somewhat, I want to maximize so I look at some greedy like approach. You can think on this and you can try to guess what exactly is the design algorithm paradigm used for this problem. Okay, now that we have seen the Python implementation for fractional NAPSAC problem, can you guess what design paradigm we have used for this implementation? You can pause the video at this point and try to guess the answer. But the right answer for this question is that we have used greedy approach. So that's it for this video.