subsector erase would increase endurance of flash memory more than whole-sector erase?
<p>I'm planning to use Spansion (now Cypress) S25FL032P flash memory. ( datasheet : <a href="http://www.cypress.com/file/196861/download" rel="nofollow noreferrer">http://www.cypress.com/file/196861/download</a> )</p>
<p>On the datasheet, it says,</p>
<blockquote>
<p> Memory architecture</p>
<p>– Uniform 64 KB sectors</p>
<p>– Top or bottom parameter block (Two 64-KB sectors (top or</p>
<p>bottom) broken down into sixteen 4-KB sub-sectors each)</p>
<p>– 256-byte page size</p>
<p>...</p>
<p> Erase</p>
<p>– Bulk erase function</p>
<p>– Sector erase (SE) command (D8h) for 64 KB sectors</p>
<p>– Sub-sector erase (P4E) command (20h) for 4 KB sectors</p>
<p>– Sub-sector erase (P8E) command (40h) for 8 KB sectors</p>
</blockquote>
<p>So, it can perform erase operation on 1. chip, 2. 64k sector, 3. 8k sector, 4k sector level.</p>
<p><strong>My question is, In both cases equivalently consume single P/E cycle on the perspective of 64kb sector?</strong></p>
<ol>
<li><p><strong>Single command for 64kb sector erase.</strong></p>
</li>
<li><p><strong>16 commands for 64kb sector erase using 4k sector erase command (P4E)</strong></p>
</li>
</ol>
<p><strong>Otherwise, second method consumes 16x P/E cycle?</strong></p>
<p>I'm asking this because I want to issue erase command on as small as possible size while maximizing cell endurance as long as possible.</p>