Understanding MIPS pipeline registers
<p>I think im missing something about the pipeline registers. I do understand the functionallity of them (for the most part), but what i dont understand, and what i cant seem to find any good info about, is how they are implemented in the CPU. Are they a part of the register file, as in are some of the registers in the register file dedicated as pipeline registers? Or are they separate elements of the CPU (different hardware)?</p>

<p>From the info i've found it seems like they are registers in the register file, but does not that mean that data is written to and read from the register file for every stage of the pipeline? Which then would require a lot of inputs for the register file?</p>

<p>Thanks in advance!</p>