Build Linux Kernel Module using Makefile with different pathname
<p>I am trying to compile a Linux kernel module using the standard example Makefile specified in the <a href="http://www.tldp.org/LDP/lkmpg/2.6/lkmpg.pdf" rel="nofollow" title="here">Linux Kernel Module Programming Guide</a>.  If the Makefile is called <code>Makefile</code>, then everything works.  If I rename the Makefile to <code>Makefile.hello</code> or something else, then it fails as it cannot find the path <code>Makefile</code>.  I was wondering if there is a command or set of flags I can add to my Makefile to make this function properly.  I need to rename the Makefile as I am calling it from CMake.  Cmake creates its own Makefiles and will commonly overwrite what I already have.  </p>

<p>I replaced my kernel module code with the hello world example and replicated the problem.  I know its the makefile.</p>

<p>hello world example <code>hello.c</code></p>

<pre><code>/*
 * hello−1.c − The simplest kernel module.
 */
#include &lt;linux/module.h&gt; /* Needed by all modules */
#include &lt;linux/kernel.h&gt; /* Needed for KERN_INFO */
int init_module(void)
{
    printk(KERN_INFO "Hello world 1.\n");
    /*
     * A non 0 return means init_module failed; module can't be loaded.
     */
    return 0;
}
void cleanup_module(void)
{
    printk(KERN_INFO "Goodbye world 1.\n");
}
</code></pre>

<p>Makefile</p>

<pre><code>obj-m += hello.o

ifeq (,$(KDIR))
    KDIR := /lib/modules/$(shell uname -r)/build
endif

PWD := $(shell pwd)

all:
    $(MAKE) -C $(KDIR) M=$(PWD) $(KCONFIG) modules

clean:
    $(MAKE) -C $(KDIR) M=$(PWD) clean
</code></pre>

<p>If makefile is called <code>Makefile</code>. (Successfully builds)</p>

<pre><code>$&gt; make -f Makefile
make -C /lib/modules/4.4.0-21-generic/build M=/home/msmith/Desktop/kernel-test  modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-21-generic'
  CC [M]  /home/msmith/Desktop/kernel-test/hello.o
  Building modules, stage 2.
  MODPOST 1 modules
  CC      /home/msmith/Desktop/kernel-test/hello.mod.o
  LD [M]  /home/msmith/Desktop/kernel-test/hello.ko
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-21-generic'
</code></pre>

<p>Make output if makefile is called <code>Makefile.hello</code>  (Fails to build)</p>

<pre><code>$&gt; make -f Makefile.hello
make -C /lib/modules/4.4.0-21-generic/build M=/home/msmith/Desktop/kernel-test  modules
make[1]: Entering directory '/usr/src/linux-headers-4.4.0-21-generic'
scripts/Makefile.build:44: /home/msmith/Desktop/kernel-test/Makefile: No such file or directory
make[2]: *** No rule to make target '/home/msmith/Desktop/kernel-test/Makefile'.  Stop.
Makefile:1396: recipe for target '_module_/home/msmith/Desktop/kernel-test' failed
make[1]: *** [_module_/home/msmith/Desktop/kernel-test] Error 2
make[1]: Leaving directory '/usr/src/linux-headers-4.4.0-21-generic'
Makefile.hello:10: recipe for target 'all' failed
make: *** [all] Error 2
</code></pre>

<p>I tried adding the -f to the internal MAKE parameters, however that just caused more issues.  </p>