Alignment requirements for uint8x16_t being loaded from byte array?
<p>We have an assert firing under Debug builds that checks for alignment. The assert is for a byte array that's loaded into a <code>uint8x16_t</code> using <code>vld1q_u8</code>. While the assert fires, we have not observed a <code>SIG_BUS</code>.</p>

<p>Here's the use in code:</p>

<pre><code>const byte* input = ...;
...

assert(IsAlignedOn(input, GetAlignmentOf(uint8x16_t));
uint64x2_t message = vreinterpretq_u64_u8(vld1q_u8(input));
</code></pre>

<p>I also tried with the following, and the assert fires for the alignment of <code>uint8_t*</code>:</p>

<pre><code>assert(IsAlignedOn(input, GetAlignmentOf(uint8_t*));
uint64x2_t message = vreinterpretq_u64_u8(vld1q_u8(input));
</code></pre>

<p>What are the alignment requirements for the byte array when loading it into a <code>uint8x16_t</code> with <code>vld1q_u8</code>?</p>

<hr>

<p>In the above code, <code>input</code> is a function paramter. <code>IsAlignedOn</code> checks the alignment of its two arguments, ensuring the first is aligned to at least the second. <code>GetAlignmentOf</code> is an abstraction that retrieves the alignment for a type or variable.</p>

<p><code>uint8x16_t</code> and <code>uint64x2_t</code> are 128-bit ARM NEON vector datatypes that are <a href="https://stackoverflow.com/q/34901932">expected to be placed in a Q register</a>. <code>vld1q_u8</code> is a NEON pseudo instruction that is expected to be compiled into <code>VLD1.8</code> instruction. <code>vreinterpretq_u64_u8</code> is an NEON pseudo instruction that eases use of the datatypes.</p>