Passing two different signals through common NAND gates twice
<p>Two signals <strong>X</strong> &amp; <strong>Y</strong> are passed through common NAND gates twice, i.e.,  </p>

<pre><code> (X NAND Y) ---&gt; NAND GATE
</code></pre>

<p>Algebraically, the solution comes as follows:  </p>

<pre><code>=(X NAND Y) NAND (X NAND Y)
=(X•Y)' NAND (X•Y)'
=[(X•Y)' • (X•Y)']'
</code></pre>

<p>Now, from De Morgan's law of boolean algebra,  </p>

<pre><code>=(X•Y)'' + (X•Y)''
=(X•Y) + (X•Y)
= X•Y
</code></pre>

<p>Now, if <strong>X=1</strong> &amp; <strong>Y=0</strong>,  </p>

<pre><code> X•Y = 1•0 = 0 (Ans.)
</code></pre>

<p>From the definition of a <strong>NAND</strong> logic gate, <em>if all the signals passing through a NAND gate are low, i.e., 0, the output is 1. If any signal is high, i.e., 1, the output is 0</em>. From this,  </p>

<pre><code> (1 NAND 0) NAND (1 NAND 0)
=0 NAND 0
=1 (Ans.)
</code></pre>

<p>From the two methods, we get two different results. Please tell me which one is accepted and also if there is any flaw in either.</p>