Makefile dependencies variable
<p>I have a simple Makefile. When i'm NOT using a variable in dependencies list it works fine. Otherwise it gives fallowing error:</p>

<pre><code>make: *** No rule to make target 'ext/configXML.o', needed by 'libledrgb-jni.so'.  Stop.
</code></pre>

<p>Furthermore when i do </p>

<pre><code>    make print-LED-CFG-SRC
LED-CFG-SRC = ../led-cfg/src
</code></pre>

<p>So the value is set properly, altough if I explicitly add rule for this file:</p>

<pre><code>ext/configXML.o: $(LED-CFG-SRC)/%.cc 
@echo 'Building file: $&lt;'
@${CXX} $(CXXFLAGS) -c -o "$@" "$&lt;"
</code></pre>

<p>It looks like the problem is with the LED-CFG-SRC to source file:</p>

<pre><code> make ext/configXML.o
make: *** No rule to make target '/configXML.cc', needed by 'ext/configXML.o'.  Stop.
</code></pre>

<p>But the file exists: </p>

<pre><code>   make list
ls -la ../led-cfg/src
total 340
drwxrwxr-x  2 gigi gigi  4096 lip 27 13:10 .
drwxrwxr-x 12 gigi gigi  4096 lip 28 10:08 ..
-rw-rw-r--  1 gigi gigi 11918 lip 28 09:54 configXML.cc
-rw-rw-r--  1 gigi gigi  2891 lip 27 13:17 configXML.h
</code></pre>

<p>Here's the source Makefile:</p>

<pre><code>    EXTOBJS = ext/configXML.o ext/packet.o ext/tinyxml2.o ext/crypt.o ext/rozkaz.o
    LED-CFG-SRC := ../led-cfg/src/ 
    INCLUDES := -I$(LED-CFG-SRC)
    CXXFLAGS := $(INCLUDES)
    LIBRARY := libledrgb-jni.so

    CXXFLAGS := $(INCLUDES) -fPIC -std=c++14

    all: dirs $(LIBRARY)

    $(LIBRARY): $(OBJFILES) $(EXTOBJS)
        $(CXX) -shared -o $@ $^



    ext/%.o: $(LED-CFG-SRC)/%.cc 
        @echo 'Building file: $&lt;'
        @${CXX} $(CXXFLAGS) -c -o "$@" "$&lt;"


    clean:
        rm -rf $(EXTOBJS)

    list:
        ls -la $(LED-CFG-SRC)

    print-%  : ; @echo $* = $($*)


    .PHONY: clean dirs
</code></pre>

<p>I'm using GNU Make 4.1</p>