Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach
Wadid Foudhaili Anouar Nechi Celine Thermann Mohammad Al Johmani Rainer Buchty Mladen Berekovic Saleh Mulhem
Intrusion detection systems (IDS) are crucial security measures nowadays to
enforce network security. Their task is to detect anomalies in network
communication and identify, if not thwart, possibly malicious behavior.
Recently, machine learning has been deployed to construct intelligent IDS. This
approach, however, is quite challenging particularly in distributed, highly
dynamic, yet resource-constrained systems like Edge setups. In this paper, we
tackle this issue from multiple angles by analyzing the concept of intelligent
IDS (I-IDS) while addressing the specific requirements of Edge devices with a
special focus on reconfigurability. Then, we introduce a systematic approach to
constructing the I-IDS on reconfigurable Edge hardware. For this, we
implemented our proposed IDS on state-of-the-art Field Programmable Gate Arrays
(FPGAs) technology as (1) a purely FPGA-based dataflow processor (DFP) and (2)
a co-designed approach featuring RISC-V soft-core as FPGA-based soft-core
processor (SCP). We complete our paper with a comparison of the state of the
art (SoA) in this domain. The results show that DFP and SCP are both suitable
for Edge applications from hardware resource and energy efficiency
perspectives. Our proposed DFP solution clearly outperforms the SoA and
demonstrates that required high performance can be achieved without
prohibitively high hardware costs. This makes our proposed DFP suitable for
Edge-based high-speed applications like modern communication technology.