A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC
  Platforms
Cristina Silvano Daniele Ielmini Fabrizio Ferrandi Leandro Fiorin Serena Curzel Luca Benini Francesco Conti Angelo Garofalo Cristian Zambelli Enrico Calore Sebastiano Fabio Schifano Maurizio Palesi Giuseppe Ascia Davide Patti Stefania Perri Nicola Petra Davide De Caro Luciano Lavagno Teodoro Urso Valeria Cardellini Gian Carlo Cardarilli Robert Birke
Recent trends in deep learning (DL) imposed hardware accelerators as the most
viable solution for several classes of high-performance computing (HPC)
applications such as image classification, computer vision, and speech
recognition. This survey summarizes and classifies the most recent advances in
designing DL accelerators suitable to reach the performance requirements of HPC
applications. In particular, it highlights the most advanced approaches to
support deep learning accelerations including not only GPU and TPU-based
accelerators but also design-specific hardware accelerators such as FPGA-based
and ASIC-based accelerators, Neural Processing Units, open hardware
RISC-V-based accelerators and co-processors. The survey also describes
accelerators based on emerging memory technologies and computing paradigms,
such as 3D-stacked Processor-In-Memory, non-volatile memories (mainly,
Resistive RAM and Phase Change Memories) to implement in-memory computing,
Neuromorphic Processing Units, and accelerators based on Multi-Chip Modules.
The survey classifies the most influential architectures and technologies
proposed in the last years, with the purpose of offering the reader a
comprehensive perspective in the rapidly evolving field of deep learning.
Finally, it provides some insights into future challenges in DL accelerators
such as quantum accelerators and photonics.