Product development insight: SAR ADCs

Texas Instruments recently released two 12bit Analog-to-Digital Converters (ADCs), the ADS7863 and the ADS7865, for dual simultaneous sampling. Designed for motor control applications, they can also be used in applications such as optical networking or radar, where two signals must be measured simultaneously. The ADS7863 provides a serial interface, while the ADS7865 offers a parallel version. Both are optimised for low power consumption; yet also offer good linearity, noise and distortion. This article gives an insight into how this performance has been achieved.

Figure 1: Block diagram of the ADS7863

These products succeed Burr-Brown's ADS7861 and ADS7862, which were optimized for AC motor control applications. Their sample rate was 500ksamples/s to provide fast data acquisition of the sensor signals, most commonly phase current and the motor position. The angle for the latter application is often measured using an optical encoder. This consists of a round piece of glass with several thousand equally distributed stripes on it, and photodiodes to count the stripes. Resolution can be increased by also measuring the photodiodes' voltage using an ADC. If the motor rotates at 7500rpm and the encoder has 4000 stripes, then the output frequency of the encoder signal hits 500kHz.

In most cases, a snapshot of the signal is taken at a certain point of time during the motor's control loop. Unfortunately, the motor's switching supply can cause heavy distortion. If the switching process occurs during the ADC's measurement, for example, then the result can be significantly out. Therefore, instead of taking a snapshot measurement, more recent applications sample the encoder signals continuously. The continuously converted signal can then be filtered in the digital domain, so that distortion can be suppressed. The Nyquist Theorem now says that the conversion rate has to be higher than twice the maximum signal frequency, so that the continuous time signal can be expressed with time discrete (digital) data. Hence, the encoder signal with 500kHz has to be converted with at least 1Msample/s. The ADS7863 and ADS7865 meet this requirement with ample headroom, providing a sample rate of 2Msample/s.

Other design objectives for the ADS7861 and ADS7862 were to keep the total harmonic distortion (THD) caused by the sample and hold stage low, keep the converter noise at the same level as former products and to remain within the 5V input range by not increasing power consumption.

Distortion at higher frequencies is invariably caused by the non-linear input resistance of the input switch, as well as its non-linear parasitic capacitors, as shown in figure 2. The effects can be minimised by reducing the sample capacitor. This has some disadvantages though. First is that the differential nonlinearity (DNL) as well as the common-mode rejection are dependent on the matching of the capacitors. Smaller capacitors will come with worse matching. Fortunately, both parameters can be trimmed.

Figure 2: Sample & Hold circuitry including parasitic elements

In addition, sampling noise increases with a decreased sampling capacitor. However, other noise sources are more dominant, such as the thermal noise of the reference buffer and the comparator.

Noise from the reference can be reduced by changing the reference concept. The ADS7861 and ADS7862 provide a fast internal buffer at the reference input, which is capable of recharging the ADC's internal capacitors within half a clock cycle. The buffer needs to have a wide bandwidth, which does mean higher power consumption as well as higher noise, but the concept is easy to use in an application.

The ADS7863 and the ADS7865 do not provide a buffer, but rely on an external capacitor at the reference input of at least 500nF. It stores so much charge that the internal capacitors can be recharged during a conversion without causing a voltage drop of more than a quarter LSB. The external capacitor then needs to be recharged within one conversion cycle, so that the required bandwidth can be relaxed dramatically. The reduced bandwidth will support the low noise at the higher conversion rate together with the low power consumption.

Unfortunately, only special sources can drive large capacitors without becoming unstable, by providing the required low impedance at the same time. The ADS7863 and ADS7865 therefore provide an internal reference with the relevant output stage. In addition, the reference is programmable from 0.5V to 2.5V, so that no circuitry is required between the special output stage and the capacitor (see figure 3).

Figure 3: A new programmable reference concept

The reference can also be programmed to 2.5V at a 2.7V supply. This enables the conversion of fully differential +/-2.5V signals around a common mode voltage of 1.35V (see figure 4). Common mode noise will be rejected with 72dB, which will keep signal integrity high.

Figure 4: Fully differential input signal

The converter supports operation over a supply voltage range of 2.7V to 5.5V. The 5V requirement means that gate length cannot be further reduced by moving to a different process technology. However, the new reference design does support low power consumption – notably, at 2.7V operation power dissipation is just 13.5mW.

The latest products provide different power saving modes. If the converter isn't used, then supply current can be reduced to 10nA typically, by switching into the power down mode. If the sample rate is less than 2Msamples/s, then the part can be used in NAP mode, where all internal blocks with fast settling are powered down and slow settling circuitry remains biased. This reduces the current consumption from 7.1mA to 1.4mA. The products are ready to convert within 200ns after switching them back into normal operation.

Figure 5: Supply current in a) NAP

b) PD mode versus the conversion rate

The new functionality necessitates programmability via a digital interface. The ADS7863 therefore provides a serial data input pin and the ADS7865 a bidirectional parallel interface, which can be supplied in the range of 2.7V to 5.5V. The reference voltage, the various power saving modes and input channel selection are programmed via the digital interface.

Originally, the ADS7861 and ADS7862 provided two fully differential inputs per ADC. Several applications use the inputs only in a pseudo differential way, where the negative input is continuously connected to 2.5V and the positive input swings with +/-2.5V around the 2.5V. In this case, it is sufficient to share one negative pin for all channels, which is connected to 2.5V, and to use the remaining three pins as positive inputs. In this way, three single ended signals can be converted with each converter. This function is also implemented inside the ADS7863 and ADS7865 and is also selectable via the digital interface.

In summary, the ADS7863 and ADS7865 provide the same performance at four times the conversion rate, and consuming the same amount of current. The parts operate in a wide analog supply voltage range (2.7V to 5.5V) as well as digital supply range (2.7V to 5.5V). Additional power down features help in power sensitive applications.

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