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On January, 18th 2000 Intel introduced the 600MHz Mobile Pentium III processor and with it its new Power Management technology called SpeedStep.

This technology provides power saving modes for the CPU which consist of lowered CPU frequency and lowered CPU core voltage, so that overall power consumption of the processor is reduced and hence battery life extended.

SpeedStep (SpeedStep V1.1)

The original SpeedStep technology, featured in the second generation Mobile Pentium III processors from 600 to 1000 MHz, was rather primitive, compared to recent standards. Processors featuring SpeedStep are capable of running in two modes, the full power mode and the power save mode. As soon as AC power is removed, the processor switches into powersave mode and remains there, independent of the systems CPU load. It is, however, possible for the user to switch it back to full power mode manually.

Enhanced SpeedStep (SpeedStep V2.1)

Introduced with the Mobile Pentium III-M processors, Enhanced Speedstep added the capability to automatically switch between the two frequencies based on current CPU load. Hence these CPUs can operate in three modes: the powersave mode, the performance mode and the automatic mode. Intel calls this enhancement Demand Based Switching.

Enhanced SpeedStep (SpeedStep V2.2)

The SpeedStep technology integrated into Mobile Pentium 4-M processors has another feature, called the Deep Alert mode. Intel states this mode enables the processor to run at even lower voltage levels, thus saving even more battery life.

EIST (SpeedStep 3)

Because changing names is cool, the third generation of the processor power management feature is called EIST. The major improvement is that these processors are not only able to switch between two frequencies (high and low), but can dynamically change over a range of frequencies, usually in steps of 100 MHz. I.e. a Pentium M with 1.5 GHz can run at frequencies of 1.5, 1.4, 1.3, 1.2, 1.1, 1.0, 0.9, 0.8, 0.7 and 0.6 GHz.

(Enhanced) EIST

The EIST featured in Pentium M is furthermore able to switch off momentarily unneeded parts of the processor's usually very power consuming L2-Cache.