PicoScope 2000 Series

6 instruments in one ultra-compact design

PicoScope 2000 ultra compact oscilloscope shown with a coffee mug

  • 2- and 4-channel models and 2+16 digital channel MSO models
  • 10 to 100 MHz bandwidth
  • Up to 128 MS buffer memory
  • Advanced waveform math and automated measurements
  • 15 serial protocol decoders as standard, including I2C, SPI, CAN, RS-232/UART and ARINC 429

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Example of I2C wiring diagram

I2C decoding


I2C uses two bidirectional open-drain lines, Serial Data (SDA) and Serial Clock (SCL), pulled up with resistors. Signalling voltages are typically 0 V for logic low and +5 V or +3.3 V for logic high.

Multiple “master” and “slave” I2C devices can be attached to the bus, allowing any master device to exchange information with any slave device, but only one master can be active at a time. Every master monitors the bus for start and stop bits, and does not start a message while another master is keeping the bus busy. If two masters start transmission at the same time an arbitration procedure ensures that only one is allowed to do so and the winning message is not corrupted.

The maximum number of devices is limited by the address space, and by the total allowed bus capacitance of 400 pF. Each device is recognized by a unique address. A device can operate as either a transmitter or a receiver, depending on its function.

I2C does not employ a standardized connector, although 0.1 inch connectors are commonly used on prototyping systems. To minimize possible damage due to plugging 0.1-inch headers in backwards, a GND-SCL-VCC-SDA signal and power connection scheme is commonly used


I2C has a 7-bit or a 10-bit addressing, depending on the device used. I²C bus speeds range from 100 kbit/s in standard mode, 400 kbit/s in Fast mode, 1 Mbit/s Fast mode plus, and 3.4 Mbit/s in High Speed mode. I²C exchanges data in the following format:

Start - When idle, both the SDA and SCL lines are high. To start a transaction SDA is driven low while SCL remains high, which indicates the device is taking control of the bus and that a message will follow.


R/W Bit - one bit indicating if the data will be read from or written to the device.

Ack - one bit from the slave device acknowledging the master’s actions. Usually each address and data byte is acknowledged, but not always.


Stop - With SDA low, SCL is pulled high, then SDA goes high. This indicates the message is complete and the master has released the bus.

I2C Data & Clock

I2C decoding in PicoScope

I2C serial decoding is included in PicoScope as standard. The decoded data can be displayed in the format of your choice: In Graph, In Table, or both at once.

In Graph format shows decoded data in a bus format, aligned with the analog waveform, on a common time axis. Frames can be zoomed and correlated with acquired analog channels to investigate timing errors or other signal integrity issues that are root cause of data errors.

In Table format shows a list of the decoded frames, including the data and all flags and identifiers. You can set up filtering conditions to display only the frames or data you are interested in, search for frames with specified properties, or use a Link File to translate frame ID and hexadecimal data into human-readable form.

I2C Decoding with PicoScope
